Publications and Presentations
From The Emerging Circuits and Computation Group at ITU
(Difference between revisions)
(→Transistor Fabrication) |
(→Organic Transistor Modeling) |
||
(28 intermediate revisions by one user not shown) | |||
Line 47: | Line 47: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/1/1c/Cevik_Aksoy_Altun_CMOS_Implementation_of_Switching_Lattices.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/1/1c/Cevik_Aksoy_Altun_CMOS_Implementation_of_Switching_Lattices.pptx Slides] |
|} | |} | ||
Line 74: | Line 74: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/7/71/Safaltin_EtAl_Technology_Development_for_Switching_Lattices.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/7/71/Safaltin_EtAl_Technology_Development_for_Switching_Lattices.pptx Slides] |
|} | |} | ||
Line 92: | Line 92: | ||
|- valign="top" | |- valign="top" | ||
| '''appeared in''': | | '''appeared in''': | ||
− | | width="624" | [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=43 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems], | + | | width="624" | [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=43 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems], Vol. 40, Issue 10, pp. 2036–2048, 2021. |
|} | |} | ||
| align=center width="70" | | | align=center width="70" | | ||
Line 122: | Line 122: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:MP4.jpg|60px|link= | + | [[File:MP4.jpg|60px|link=https://www.ecc.itu.edu.tr/images/7/7c/Aksoy_Altun_Lattice_Synthesis_for_Complex_Functions.mp4]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/7/7c/Aksoy_Altun_Lattice_Synthesis_for_Complex_Functions.mp4 Slides] |
|} | |} | ||
Line 169: | Line 169: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/5/54/Aksoy_Altun_SAT_based_Synthesis_of_Switching_Lattices.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/5/54/Aksoy_Altun_SAT_based_Synthesis_of_Switching_Lattices.pptx Slides] |
|} | |} | ||
Line 259: | Line 259: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/2/28/Altun_Riedel_Lattice-Based_Computation_of_Boolean_Functions.ppt]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/2/28/Altun_Riedel_Lattice-Based_Computation_of_Boolean_Functions.ppt Slides] |
|} | |} | ||
Line 287: | Line 287: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/f/fe/Altun_Riedel_Neuhauser_Nanoscale_Digital_Computation_Through_Percolation.ppt]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/f/fe/Altun_Riedel_Neuhauser_Nanoscale_Digital_Computation_Through_Percolation.ppt Slides] |
|} | |} | ||
== Energy Efficient ANN Hardware Implementation == | == Energy Efficient ANN Hardware Implementation == | ||
+ | |||
+ | {| style="border:2px solid #abd5f5; background:#f1f5fc;" | ||
+ | | | ||
+ | {| | ||
+ | |- valign=top | ||
+ | | width="100" |'''title''': | ||
+ | | width="624"|[[Media:Karadeniz_Altun_TALIPOT.pdf | TALIPOT: Energy Efficient DNN Booster Employing Hybrid Bit Parallel-Serial Processing in MSB-First Fashion]] | ||
+ | |- valign="top" | ||
+ | | '''authors''': | ||
+ | | Burak Karadeniz and [[Mustafa Altun]] | ||
+ | |- valign="top" | ||
+ | | '''appeared in''': | ||
+ | | width="624" | [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=43 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems], early access, 2021. | ||
+ | |} | ||
+ | | align=center width="70" | | ||
+ | <span class="plainlinks"> | ||
+ | [[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/0/01/Karadeniz_Altun_TALIPOT.pdf]]</span> | ||
+ | <br> | ||
+ | [[Media:Karadeniz_Altun_TALIPOT.pdf | Paper]] | ||
+ | |} | ||
+ | |||
+ | {| style="border:2px solid #abd5f5; background:#f1f5fc;" | ||
+ | | | ||
+ | {| | ||
+ | |- valign=top | ||
+ | | width="100" |'''title''': | ||
+ | | width="550"|[[Media:Nojehdeh_Parvin_Altun_ANN_Implementation_with_MAC.pdf | Efficient Hardware Implementation of Convolution Layers Using Multiply-Accumulate Blocks]] | ||
+ | |- valign="top" | ||
+ | | '''authors''': | ||
+ | | Mohammadreza Nojehdeh, Sajjad Parvin, and [[Mustafa Altun]] | ||
+ | |- valign=top | ||
+ | | '''presented at''': | ||
+ | | [http://www.eng.ucy.ac.cy/theocharides/isvlsi21/ IEEE Computer Society Annual Symposium on VLSI (ISVLSI)], Tampa, USA, 2021. | ||
+ | |} | ||
+ | |||
+ | | align=center width="70" | | ||
+ | <span class="plainlinks"> | ||
+ | [[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/4/41/Nojehdeh_Parvin_Altun_ANN_Implementation_with_MAC.pdf]]</span> | ||
+ | <br> | ||
+ | [[Media:Nojehdeh_Parvin_Altun_ANN_Implementation_with_MAC.pdf | Paper]] | ||
+ | | align="center" width="70" | | ||
+ | <span class="plainlinks"> | ||
+ | |||
+ | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/b/bf/Nojehdeh_Parvin_Altun_ANN_Implementation_with_MAC.pptx]] | ||
+ | </span> | ||
+ | <br> [https://www.ecc.itu.edu.tr/images/b/bf/Nojehdeh_Parvin_Altun_ANN_Implementation_with_MAC.pptx Slides] | ||
+ | |} | ||
+ | |||
+ | {| style="border:2px solid #abd5f5; background:#f1f5fc;" | ||
+ | | | ||
+ | {| | ||
+ | |- valign=top | ||
+ | | width="100" |'''title''': | ||
+ | | width="550"|[[Media:Parvin_Altun_Hardware_Aware_ANN_Training.pdf | A Study on Hardware-Aware Training Techniques for Feedforward Artificial Neural Networks]] | ||
+ | |- valign="top" | ||
+ | | '''authors''': | ||
+ | | Sajjad Parvin and [[Mustafa Altun]] | ||
+ | |- valign=top | ||
+ | | '''presented at''': | ||
+ | | [http://www.eng.ucy.ac.cy/theocharides/isvlsi21/ IEEE Computer Society Annual Symposium on VLSI (ISVLSI)], Tampa, USA, 2021. | ||
+ | |} | ||
+ | |||
+ | | align=center width="70" | | ||
+ | <span class="plainlinks"> | ||
+ | [[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/9/95/Parvin_Altun_Hardware_Aware_ANN_Training.pdf]]</span> | ||
+ | <br> | ||
+ | [[Media:Parvin_Altun_Hardware_Aware_ANN_Training.pdf | Paper]] | ||
+ | | align="center" width="70" | | ||
+ | <span class="plainlinks"> | ||
+ | |||
+ | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/c/cb/Parvin_Altun_Hardware_Aware_ANN_Training.pptx]] | ||
+ | </span> | ||
+ | <br> [https://www.ecc.itu.edu.tr/images/c/cb/Parvin_Altun_Hardware_Aware_ANN_Training.pptx Slides] | ||
+ | |} | ||
{| style="border:2px solid #abd5f5; background:#f1f5fc;" | {| style="border:2px solid #abd5f5; background:#f1f5fc;" | ||
Line 315: | Line 389: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/3/3a/Aksoy_Parvin_Nojehdeh_Altun_Time_Multiplexed_ANN_Implementation.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/3/3a/Aksoy_Parvin_Nojehdeh_Altun_Time_Multiplexed_ANN_Implementation.pptx Slides] |
|} | |} | ||
Line 336: | Line 410: | ||
|- valign=top | |- valign=top | ||
| '''appeared in''': | | '''appeared in''': | ||
− | | width="624" | [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=7729 IEEE Transactions on Nanotechnology], | + | | width="624" | [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=7729 IEEE Transactions on Nanotechnology], Vol. 20, pp. 39–53 2021. |
|} | |} | ||
| align=center width="70" | | | align=center width="70" | | ||
Line 367: | Line 441: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/9/9f/Altun_EtAl_NANOxCOMP_Lessons_Learned_Future_Directions.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/9/9f/Altun_EtAl_NANOxCOMP_Lessons_Learned_Future_Directions.pptx Slides] |
|} | |} | ||
Line 393: | Line 467: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/b/bd/Morgul_EtAl_Integrated_Synthesis_Methodology_for_Crossbar_Arrays.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/b/bd/Morgul_EtAl_Integrated_Synthesis_Methodology_for_Crossbar_Arrays.pptx Slides] |
|} | |} | ||
Line 420: | Line 494: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/b/b8/Tunali_Altun_Logic_Synthesis_and_Defect_Tolerance_for_Memristive_Crossbars.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/b/b8/Tunali_Altun_Logic_Synthesis_and_Defect_Tolerance_for_Memristive_Crossbars.pptx Slides] |
|} | |} | ||
Line 468: | Line 542: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/2/28/Altun_Ciriani_Tahoori_Computing_with_Nano-Crossbar_Arrays.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/2/28/Altun_Ciriani_Tahoori_Computing_with_Nano-Crossbar_Arrays.pptx Slides] |
|} | |} | ||
Line 496: | Line 570: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PDF.png|65px|link= | + | [[File:PDF.png|65px|link=https://www.ecc.itu.edu.tr/images/7/7f/Altun_EtAl_Synthesis_and_Performance_Optimization_of_a_Switching_Nano-crossbar_Computer_SLIDES.pdf]] |
</span> | </span> | ||
<br> [[Media:Altun_EtAl_Synthesis_and_Performance_Optimization_of_a_Switching_Nano-crossbar_Computer_SLIDES.pdf | Slides]] | <br> [[Media:Altun_EtAl_Synthesis_and_Performance_Optimization_of_a_Switching_Nano-crossbar_Computer_SLIDES.pdf | Slides]] | ||
Line 524: | Line 598: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/5/5a/Morgul_Peker_Altun_Power-Delay-Area_Performance_Modeling_and_Analysis_for_Nano-Crossbar_Arrays.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/5/5a/Morgul_Peker_Altun_Power-Delay-Area_Performance_Modeling_and_Analysis_for_Nano-Crossbar_Arrays.pptx Poster] |
|} | |} | ||
Line 613: | Line 687: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/6/62/Tunali_Altun_Nano_Crossbar_Yield_Analysis.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/6/62/Tunali_Altun_Nano_Crossbar_Yield_Analysis.pptx Slides] |
|} | |} | ||
Line 679: | Line 753: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/f/f9/Tunali_Altun_Defect_Tolerance_in_Diode_FET_and_Four-Terminal_Switch_based_Nano-Crossbar_Arrays.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/f/f9/Tunali_Altun_Defect_Tolerance_in_Diode_FET_and_Four-Terminal_Switch_based_Nano-Crossbar_Arrays.pptx Slides] |
|} | |} | ||
Line 707: | Line 781: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/1/1a/Morgul_Altun_Synthesis_and_Optimization_of_Switching_Nanoarrays.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/1/1a/Morgul_Altun_Synthesis_and_Optimization_of_Switching_Nanoarrays.pptx Slides] |
|} | |} | ||
Line 742: | Line 816: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/a/aa/Morgul_Altun_Anahtarlamali_Nano_Dizinler_ile_Lojik_Devre_Tasarimi_ve_Boyut_Optimizasyonu.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/a/aa/Morgul_Altun_Anahtarlamali_Nano_Dizinler_ile_Lojik_Devre_Tasarimi_ve_Boyut_Optimizasyonu.pptx Slides] |
|} | |} | ||
== Stochastic and Bit Stream Computing == | == Stochastic and Bit Stream Computing == | ||
+ | |||
+ | {| style="border:2px solid #abd5f5; background:#f1f5fc;" | ||
+ | | | ||
+ | {| | ||
+ | |- valign=top | ||
+ | | width="100" |'''title''': | ||
+ | | width="624"|[[Media:Karadeniz_Cevik_Altun_STAMP_Stochastic_Number_Generator.pdf | STAMP: A Real-Time and Low-Power Sampling Error Based Stochastic Number Generator]] | ||
+ | |- valign="top" | ||
+ | | '''authors''': | ||
+ | | Burak Karadeniz, Ismail Cevik, and [[Mustafa Altun]] | ||
+ | |- valign="top" | ||
+ | | '''appeared in''': | ||
+ | | [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6287639 IEEE Access], Vol. 9, pp. 151363–151372, 2021. | ||
+ | |} | ||
+ | |||
+ | | align=center width="70" | | ||
+ | <span class="plainlinks"> | ||
+ | |||
+ | [[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/d/dd/Karadeniz_Cevik_Altun_STAMP_Stochastic_Number_Generator.pdf]]</span> | ||
+ | <br> | ||
+ | [[Media:Karadeniz_Cevik_Altun_STAMP_Stochastic_Number_Generator.pdf | Paper]] | ||
+ | |} | ||
{| style="border:2px solid #abd5f5; background:#f1f5fc;" | {| style="border:2px solid #abd5f5; background:#f1f5fc;" | ||
Line 791: | Line 887: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/a/ab/Karadeniz_Altun_Stochastic_Number_Generator.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/a/ab/Karadeniz_Altun_Stochastic_Number_Generator.pptx Slides] |
|} | |} | ||
Line 819: | Line 915: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/d/d6/Vahapoglu_Altun_Accurate_Synthesis_of_Arithmetic_Operations_with_Stochastic_Logic.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/d/d6/Vahapoglu_Altun_Accurate_Synthesis_of_Arithmetic_Operations_with_Stochastic_Logic.pptx Poster] |
|} | |} | ||
Line 854: | Line 950: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/f/f0/Yavuz_Altun_Stokastik_Hesaplamada_Hata_Oranlarini_Azaltmak_icin_Rastgele_Bit_Karistirma_Yontemi.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/f/f0/Yavuz_Altun_Stokastik_Hesaplamada_Hata_Oranlarini_Azaltmak_icin_Rastgele_Bit_Karistirma_Yontemi.pptx Slides] |
|} | |} | ||
Line 883: | Line 979: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/7/7f/Nojehdeh_Aksoy_Altun_Approximate_ANN.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/7/7f/Nojehdeh_Aksoy_Altun_Approximate_ANN.pptx Slides] |
|} | |} | ||
Line 942: | Line 1,038: | ||
|- valign=top | |- valign=top | ||
| '''presented at''': | | '''presented at''': | ||
− | | width="550"| [http:// | + | | width="550"| [http://smacd-conference.org/ International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)], Prague, Czech Republic, 2018. |
|} | |} | ||
Line 953: | Line 1,049: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/a/a4/Ayhan_Altun_Approximate_Neural_Network_Generation.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/a/a4/Ayhan_Altun_Approximate_Neural_Network_Generation.pptx Slides] |
|} | |} | ||
Line 980: | Line 1,076: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/8/86/Ayhan_Kula_Altun_Approximate_System_Design_Methodology.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/8/86/Ayhan_Kula_Altun_Approximate_System_Design_Methodology.pptx Slides] |
|} | |} | ||
Line 1,015: | Line 1,111: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/5/58/Kula_Ayhan_Altun_Approximate_FIR_Filter_Implementation.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/5/58/Kula_Ayhan_Altun_Approximate_FIR_Filter_Implementation.pptx Slides] |
|} | |} | ||
Line 1,037: | Line 1,133: | ||
|- valign="top" | |- valign="top" | ||
| '''appeared in''': | | '''appeared in''': | ||
− | | [http://www.journals.elsevier.com/thin-solid-films Thin Solid Films], | + | | [http://www.journals.elsevier.com/thin-solid-films Thin Solid Films], Vol. 727, Article 138677, 2021. |
|} | |} | ||
| align=center width="70" | | | align=center width="70" | | ||
Line 1,073: | Line 1,169: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/2/25/Yedikardes_EtAl_P3HT_WO3_Organic_Transistors.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/2/25/Yedikardes_EtAl_P3HT_WO3_Organic_Transistors.pptx Slides] |
|} | |} | ||
=== Organic Transistor Modeling === | === Organic Transistor Modeling === | ||
+ | |||
+ | {| style="border:2px solid #abd5f5; background:#f1f5fc;" | ||
+ | |||
+ | | | ||
+ | {| | ||
+ | |- valign=top | ||
+ | | width="100" |'''title''': | ||
+ | | width="550"|[[Media:Akkan_Sedef_Altun_TFT_Level_3_Spice_Model.pdf | The Level 3 Based SPICE Model for Low-Voltage Pentacene Thin Film Transistors]] | ||
+ | |- valign="top" | ||
+ | | '''authors''': | ||
+ | | Nihat Akkan, [[Mustafa Altun]], and Herman Sedef | ||
+ | |- valign=top | ||
+ | | '''presented at''': | ||
+ | | width="550"| [http://smacd-conference.org/ International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)], Sardinia, Italy, 2022. | ||
+ | |} | ||
+ | |||
+ | | align=center width="70" | | ||
+ | <span class="plainlinks"> | ||
+ | [[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/c/c1/Akkan_Sedef_Altun_TFT_Level_3_Spice_Model.pdf]]</span> | ||
+ | <br> | ||
+ | [[Media:Akkan_Sedef_Altun_TFT_Level_3_Spice_Model.pdf | Paper]] | ||
+ | | align="center" width="70" | | ||
+ | <span class="plainlinks"> | ||
+ | |||
+ | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/6/6e/Akkan_Sedef_Altun_TFT_Level_3_Spice_Model.pptx]] | ||
+ | </span> | ||
+ | <br> [https://www.ecc.itu.edu.tr/images/6/6e/Akkan_Sedef_Altun_TFT_Level_3_Spice_Model.pptx Slides] | ||
+ | |} | ||
{| style="border:2px solid #abd5f5; background:#f1f5fc; " | {| style="border:2px solid #abd5f5; background:#f1f5fc; " | ||
Line 1,115: | Line 1,239: | ||
|- valign=top | |- valign=top | ||
| '''presented at''': | | '''presented at''': | ||
− | | width="550"| [http:// | + | | width="550"| [http://smacd-conference.org/ International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)], Prague, Czech Republic, 2018. |
|} | |} | ||
Line 1,126: | Line 1,250: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/b/b9/Akkan_Altun_Sedef_OFET_Parameter_Extraction_with_ABC.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/b/b9/Akkan_Altun_Sedef_OFET_Parameter_Extraction_with_ABC.pptx Slides] |
|} | |} | ||
Line 1,181: | Line 1,305: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/f/f4/Parvin_Altun_CMOS_Fault_Tolerance_with_Preservative_Reversible_Gates.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/f/f4/Parvin_Altun_CMOS_Fault_Tolerance_with_Preservative_Reversible_Gates.pptx Poster] |
|} | |} | ||
Line 1,278: | Line 1,402: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/d/d0/Susam_Altun_An_Efficient_Algorithm_to_Synthesize_Quantum_Circuits_and_Optimization.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/d/d0/Susam_Altun_An_Efficient_Algorithm_to_Synthesize_Quantum_Circuits_and_Optimization.pptx Slides] |
|} | |} | ||
Line 1,310: | Line 1,434: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/3/38/Susam_Altun_Kuantum_Devre_Sentezi_ve_Optimizasyonu_icin_Verimli_Bir_Algoritma.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/3/38/Susam_Altun_Kuantum_Devre_Sentezi_ve_Optimizasyonu_icin_Verimli_Bir_Algoritma.pptx Slides] |
|} | |} | ||
Line 1,383: | Line 1,507: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/d/de/Yadavari_EtAl_Effects_of_ZnO_Varistor_Degradation_on_the_Overvoltage_Protection_Mechanism_of_Electronic_Boards.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/d/de/Yadavari_EtAl_Effects_of_ZnO_Varistor_Degradation_on_the_Overvoltage_Protection_Mechanism_of_Electronic_Boards.pptx Slides] |
|} | |} | ||
Line 1,410: | Line 1,534: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/a/a8/Sal_Altun_Extensive_Investigation_of_CALT_in_Comparison_with_ALT.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/a/a8/Sal_Altun_Extensive_Investigation_of_CALT_in_Comparison_with_ALT.pptx Slides] |
|} | |} | ||
Line 1,438: | Line 1,562: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/a/a7/Comert_Altun_Nadar_Erturk_Warranty_Forecasting_of_Electronic_Boards_using_Short-term_Field_Data.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/a/a7/Comert_Altun_Nadar_Erturk_Warranty_Forecasting_of_Electronic_Boards_using_Short-term_Field_Data.pptx Slides] |
|} | |} | ||
Line 1,465: | Line 1,589: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/e/eb/Comert_Yadavari_Altun_Erturk_Reliability_Prediction_of_Electronic_Boards_by_Analyzing_Field_Return_Data.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/e/eb/Comert_Yadavari_Altun_Erturk_Reliability_Prediction_of_Electronic_Boards_by_Analyzing_Field_Return_Data.pptx Slides] |
|} | |} | ||
Line 1,500: | Line 1,624: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/f/f9/Avci_Altun_Reliability_Model_for_MOSFET_GOB.pptx]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/f/f9/Avci_Altun_Reliability_Model_for_MOSFET_GOB.pptx Slides] |
|} | |} | ||
Line 1,716: | Line 1,840: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/7/77/Altun_Kuntman_A_Wideband_CMOS_Current-Mode_Operational_Amplifier_and_Its_Use_for_Band-Pass_Filter_Realization.ppt]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/7/77/Altun_Kuntman_A_Wideband_CMOS_Current-Mode_Operational_Amplifier_and_Its_Use_for_Band-Pass_Filter_Realization.ppt Slides] |
|} | |} | ||
Line 1,799: | Line 1,923: | ||
<span class="plainlinks"> | <span class="plainlinks"> | ||
− | [[File:PPT.jpg|60px|link= | + | [[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/8/8d/Altun_MSc_Thesis_Akim_Modlu_Islemsel_Kuvvetlendirici_Tasarimi_ve_Uygulamalari.ppt]] |
</span> | </span> | ||
− | <br> [ | + | <br> [https://www.ecc.itu.edu.tr/images/8/8d/Altun_MSc_Thesis_Akim_Modlu_Islemsel_Kuvvetlendirici_Tasarimi_ve_Uygulamalari.ppt Slides] |
|} | |} | ||
Revision as of 17:18, 15 June 2022
Listed below are the papers, first authored by our group members as an indication that the related research is mainly conducted in our group, and the presentations. Research topics are ordered from newest to oldest as well as by considering their importance. Under each topic, papers are ordered from newest to oldest. All materials are subject to copyrights.
Computing with Switching Lattices
Technology Development
|
|
|
|
|
Logic Synthesis and Fault/Variation Tolerance
|
|
|
|
|
|
|
|
|
|
|
|
|
Energy Efficient ANN Hardware Implementation
|
|
|
|
|
|
|
Computing with Nano-Crossbar Arrays
Comprehensive Performance Optimization
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Logic Synthesis and Fault/Variation Tolerance
|
|
|
|
|
|
|
|
|
|
|
National Publications in Turkish
|
|
|
Stochastic and Bit Stream Computing
|
|
|
|
|
|
|
National Publications in Turkish
|
|
|
Approximate Computing
|
|
|
|
|
|
|
|
National Publications in Turkish
|
|
|
Large-Area Electronics
Transistor Fabrication
|
|
|
Organic Transistor Modeling
|
|
|
|
|
Reversible Computing
CMOS Fault Tolerance
|
|
|
|
|
Logic Synthesis
|
|
|
National Publications in Turkish
|
|
|
Reliability of Electronic Products
|
|
|
|
|
|
|
|
|
|
National Publications in Turkish
|
|
|
Analog Circuit Design
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
National Publications in Turkish
|
|
Discrete Mathematics
|
|