Publications and Presentations

From The Emerging Circuits and Computation Group at ITU
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Listed below are the papers, '''first authored''' by our group members as an indication that the related research is mainly conducted in our group, and the presentations. Research topics are ordered from newest to oldest as well as by considering their importance. Under each topic, papers are ordered from newest to oldest. All materials are subject to copyrights.
 
Listed below are the papers, '''first authored''' by our group members as an indication that the related research is mainly conducted in our group, and the presentations. Research topics are ordered from newest to oldest as well as by considering their importance. Under each topic, papers are ordered from newest to oldest. All materials are subject to copyrights.
 
<div style="float:center; font-size:110%; font-weight:bold; clear:both; padding:0; margin:0.0em;">__TOC__</div>
 
<div style="float:center; font-size:110%; font-weight:bold; clear:both; padding:0; margin:0.0em;">__TOC__</div>
−
== Computing with Nano-Crossbar Arrays ==
+
 
 +
== Computing with Switching Lattices ==
  
 
=== Technology Development ===
 
=== Technology Development ===
Line 57: Line 58:
 
<br> [http://www.ecc.itu.edu.tr/images/7/71/Safaltin_EtAl_Technology_Development_for_Switching_Lattices.pptx Slides]
 
<br> [http://www.ecc.itu.edu.tr/images/7/71/Safaltin_EtAl_Technology_Development_for_Switching_Lattices.pptx Slides]
 
|}
 
|}
 +
 +
=== Performance Optimization ===
 +
 +
=== Logic Synthesis ===
 +
 +
{| style="border:2px solid #abd5f5; background:#f1f5fc;"
 +
|
 +
{|
 +
|- valign=top
 +
| width="100" |'''title''':
 +
| width="550"|[[Media:Aksoy_Altun_Lattice_Synthesis_for_Complex_Functions.pdf | A Novel Method for the Realization of Complex Logic Functions Using Switching Lattices]]
 +
|- valign="top"
 +
| '''authors''':
 +
| Levent Aksoy and [[Mustafa Altun]]
 +
|- valign="top"
 +
| '''presented&nbsp;at''':
 +
| [http://iscas2020.org/ IEEE International Symposium on Circuits and Systems (ISCAS)], Seville, Spain, 2020.
 +
|}
 +
| align=center width="70" |
 +
<span class="plainlinks">
 +
[[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/7/72/Aksoy_Altun_Lattice_Synthesis_for_Complex_Functions.pdf]]</span>
 +
<br>
 +
[[Media:Aksoy_Altun_Lattice_Synthesis_for_Complex_Functions.pdf | Paper]]
 +
| align="center" width="70" |
 +
<span class="plainlinks">
 +
 +
[[File:PPT.jpg|60px|link=]]
 +
</span>
 +
<br> Poster
 +
|}
 +
 +
{| style="border:2px solid #abd5f5; background:#f1f5fc;"
 +
|
 +
{|
 +
|- valign=top
 +
| width="100" |'''title''':
 +
| width="624"|[[Media:Aksoy_Altun_Realizations_with_Switching_Lattices.pdf | Novel Methods for Efficient Realization of Logic Functions Using Switching Lattices]]
 +
|- valign="top"
 +
| '''authors''':
 +
| Levent Aksoy and [[Mustafa Altun]]
 +
|- valign="top"
 +
| '''appeared&nbsp;in''':
 +
| [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12 IEEE Transactions on Computers], Vol. 69, Issue 3, pp. 427&ndash;440, 2020.
 +
|}
 +
| align=center width="70" |
 +
<span class="plainlinks">
 +
[[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/e/e0/Aksoy_Altun_Realizations_with_Switching_Lattices.pdf]]</span>
 +
<br>
 +
[[Media:Aksoy_Altun_Realizations_with_Switching_Lattices.pdf | Paper]]
 +
|}
 +
 +
{| style="border:2px solid #abd5f5; background:#f1f5fc;"
 +
 +
|
 +
{|
 +
|- valign=top
 +
| width="100" |'''title''':
 +
| width="550"|[[Media: Aksoy_Altun_SAT_based_Synthesis_of_Switching_Lattices.pdf| A Satisfiability-Based Approximate Algorithm for Logic Synthesis Using Switching Lattices]]
 +
|- valign="top"
 +
| '''authors''':
 +
| Levent Aksoy and [[Mustafa Altun]]
 +
|- valign="top"
 +
| '''presented&nbsp;at''':
 +
| width="550"| [http://www.date-conference.com/ Design, Automation and Test in Europe (DATE)], Florence, Italy, 2019.
 +
|}
 +
| align=center width="70" |
 +
<span class="plainlinks">
 +
[[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/f/fe/Aksoy_Altun_SAT_based_Synthesis_of_Switching_Lattices.pdf]]</span>
 +
<br>
 +
[[Media:Aksoy_Altun_SAT_based_Synthesis_of_Switching_Lattices.pdf | Paper]]
 +
| align="center" width="70" |
 +
<span class="plainlinks">
 +
 +
[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/5/54/Aksoy_Altun_SAT_based_Synthesis_of_Switching_Lattices.pptx]]
 +
</span>
 +
<br> [http://www.ecc.itu.edu.tr/images/5/54/Aksoy_Altun_SAT_based_Synthesis_of_Switching_Lattices.pptx Slides]
 +
|}
 +
 +
{| style="border:2px solid #abd5f5; background:#f1f5fc;"
 +
|
 +
{|
 +
|- valign=top
 +
| width="100" |'''title''':
 +
| width="624"|[[Media:Morgul_Altun_Algorithms_for_Switching_Lattices.pdf | Optimal and Heuristic Algorithms to Synthesize Lattices of Four-Terminal Switches]]
 +
|- valign="top"
 +
| '''authors''':
 +
| Ceylan Morgul and [[Mustafa Altun]]
 +
|- valign="top"
 +
| '''appeared&nbsp;in''':
 +
| width="624" | [http://www.journals.elsevier.com/integration Integration, the VLSI Journal],  Vol. 64, pp. 60&ndash;70, 2019.
 +
|}
 +
| align=center width="70" |
 +
<span class="plainlinks">
 +
[[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/5/58/Morgul_Altun_Algorithms_for_Switching_Lattices.pdf]]</span>
 +
<br>
 +
[[Media:Morgul_Altun_Algorithms_for_Switching_Lattices.pdf | Paper]]
 +
|}
 +
 +
{| style="border:2px solid #abd5f5; background:#f1f5fc;"
 +
|
 +
{|
 +
|- valign=top
 +
| width="100" |'''title''':
 +
| width="624"|[[Media:Altun_Riedel_Logic_Synthesis_for_Switching_Lattices.pdf | Logic Synthesis for Switching Lattices]]
 +
|- valign="top"
 +
| '''authors''':
 +
| [[Mustafa Altun]] and Marc Riedel
 +
|- valign="top"
 +
| '''appeared&nbsp;in''':
 +
| [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12 IEEE Transactions on Computers], Vol. 61, Issue 11, pp. 1588&ndash;1600, 2012.
 +
<!-- |- valign="top"
 +
| '''presented&nbsp;at''':
 +
| width="624"| [http://fias.uni-frankfurt.de International Conference on Computational Modelling of Nanostructured Materials (ICCMNM)-FIAS], Frankfurt, Germany, 2013. -->
 +
|}
 +
| align=center width="70" |
 +
<span class="plainlinks">
 +
[[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/c/ca/Altun_Riedel_Logic_Synthesis_for_Switching_Lattices.pdf]]</span>
 +
<br>
 +
[[Media:Altun_Riedel_Logic_Synthesis_for_Switching_Lattices.pdf | Paper]]
 +
|}
 +
 +
{| style="border:2px solid #abd5f5; background:#f1f5fc;"
 +
|
 +
{|
 +
|- valign=top
 +
| width="100" |'''title''':
 +
| width="550"|[[Media:Altun_Riedel_Lattice-Based_Computation_of_Boolean_Functions.pdf | Lattice Based Computation of Boolean Functions]]
 +
|- valign="top"
 +
| '''authors''':
 +
| [[Mustafa Altun]] and Marc Riedel
 +
|- valign="top"
 +
| '''presented&nbsp;at''':
 +
| [http://www.dac.com IEEE/ACM Design Automation Conference (DAC)], Anaheim, USA, 2010.
 +
|}
 +
| align=center width="70" |
 +
<span class="plainlinks">
 +
[[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/7/7b/Altun_Riedel_Lattice-Based_Computation_of_Boolean_Functions.pdf]]</span>
 +
<br>
 +
[[Media:Altun_Riedel_Lattice-Based_Computation_of_Boolean_Functions.pdf | Paper]]
 +
| align="center" width="70" |
 +
<span class="plainlinks">
 +
 +
[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/2/28/Altun_Riedel_Lattice-Based_Computation_of_Boolean_Functions.ppt]]
 +
</span>
 +
<br> [http://www.ecc.itu.edu.tr/images/2/28/Altun_Riedel_Lattice-Based_Computation_of_Boolean_Functions.ppt Slides]
 +
|}
 +
 +
==== National Publications in Turkish ====
 +
 +
{| style="border:2px solid #abd5f5; background:#f1f5fc;"
 +
 +
|
 +
{|
 +
|- valign=top
 +
| width="100" |'''title''':
 +
| width="550"|[[Media:Morgul_Altun_Anahtarlamali_Nano_Dizinler_ile_Lojik_Devre_Tasarimi_ve_Boyut_Optimizasyonu.pdf | Logic Circuit Design with Switching Nano Arrays and Area Optimization]]
 +
|- valign="top
 +
| width="100" |'''title (in Turkish)''':
 +
| width="550"|[[Media:Morgul_Altun_Anahtarlamali_Nano_Dizinler_ile_Lojik_Devre_Tasarimi_ve_Boyut_Optimizasyonu.pdf | Anahtarlamalı Nano Dizinler ile Lojik Devre Tasarımı ve Boyut Optimizasyonu]]
 +
|- valign="top
 +
| '''authors''':
 +
| Ceylan Morgul and [[Mustafa Altun]]
 +
|- valign="top"
 +
| '''presented at''':
 +
| width="550"| [http://www.eleco.org.tr/ Elektrik, Elektronik, Bilgisayar ve Biyomedikal Mühendisliği Sempozyumu (ELECO)], Bursa, Turkey, 2014.
 +
|}
 +
 +
| align=center width="70" |
 +
<span class="plainlinks">
 +
 +
[[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/9/99/Morgul_Altun_Anahtarlamali_Nano_Dizinler_ile_Lojik_Devre_Tasarimi_ve_Boyut_Optimizasyonu.pdf]]</span>
 +
<br>
 +
[[Media:Morgul_Altun_Anahtarlamali_Nano_Dizinler_ile_Lojik_Devre_Tasarimi_ve_Boyut_Optimizasyonu.pdf  | Paper]]
 +
 +
| align="center" width="70" |
 +
<span class="plainlinks">
 +
 +
[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/a/aa/Morgul_Altun_Anahtarlamali_Nano_Dizinler_ile_Lojik_Devre_Tasarimi_ve_Boyut_Optimizasyonu.pptx]]
 +
</span>
 +
<br> [http://www.ecc.itu.edu.tr/images/a/aa/Morgul_Altun_Anahtarlamali_Nano_Dizinler_ile_Lojik_Devre_Tasarimi_ve_Boyut_Optimizasyonu.pptx Slides]
 +
|}
 +
 +
== Computing with Nano-Crossbar Arrays ==
  
 
=== Comprehensive Performance Optimization===
 
=== Comprehensive Performance Optimization===
Line 448: Line 632:
  
 
=== Logic Synthesis ===
 
=== Logic Synthesis ===
−
 
−
{| style="border:2px solid #abd5f5; background:#f1f5fc;"
 
−
|
 
−
{|
 
−
|- valign=top
 
−
| width="100" |'''title''':
 
−
| width="550"|[[Media:Aksoy_Altun_Lattice_Synthesis_for_Complex_Functions.pdf | A Novel Method for the Realization of Complex Logic Functions Using Switching Lattices]]
 
−
|- valign="top"
 
−
| '''authors''':
 
−
| Levent Aksoy and [[Mustafa Altun]]
 
−
|- valign="top"
 
−
| '''presented&nbsp;at''':
 
−
| [http://iscas2020.org/ IEEE International Symposium on Circuits and Systems (ISCAS)], Seville, Spain, 2020.
 
−
|}
 
−
| align=center width="70" |
 
−
<span class="plainlinks">
 
−
[[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/7/72/Aksoy_Altun_Lattice_Synthesis_for_Complex_Functions.pdf]]</span>
 
−
<br>
 
−
[[Media:Aksoy_Altun_Lattice_Synthesis_for_Complex_Functions.pdf | Paper]]
 
−
| align="center" width="70" |
 
−
<span class="plainlinks">
 
−
 
−
[[File:PPT.jpg|60px|link=]]
 
−
</span>
 
−
<br> Poster
 
−
|}
 
−
 
−
{| style="border:2px solid #abd5f5; background:#f1f5fc;"
 
−
|
 
−
{|
 
−
|- valign=top
 
−
| width="100" |'''title''':
 
−
| width="624"|[[Media:Aksoy_Altun_Realizations_with_Switching_Lattices.pdf | Novel Methods for Efficient Realization of Logic Functions Using Switching Lattices]]
 
−
|- valign="top"
 
−
| '''authors''':
 
−
| Levent Aksoy and [[Mustafa Altun]]
 
−
|- valign="top"
 
−
| '''appeared&nbsp;in''':
 
−
| [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12 IEEE Transactions on Computers], Vol. 69, Issue 3, pp. 427&ndash;440, 2020.
 
−
|}
 
−
| align=center width="70" |
 
−
<span class="plainlinks">
 
−
[[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/e/e0/Aksoy_Altun_Realizations_with_Switching_Lattices.pdf]]</span>
 
−
<br>
 
−
[[Media:Aksoy_Altun_Realizations_with_Switching_Lattices.pdf | Paper]]
 
−
|}
 
−
 
−
{| style="border:2px solid #abd5f5; background:#f1f5fc;"
 
−
 
−
|
 
−
{|
 
−
|- valign=top
 
−
| width="100" |'''title''':
 
−
| width="550"|[[Media: Aksoy_Altun_SAT_based_Synthesis_of_Switching_Lattices.pdf| A Satisfiability-Based Approximate Algorithm for Logic Synthesis Using Switching Lattices]]
 
−
|- valign="top"
 
−
| '''authors''':
 
−
| Levent Aksoy and [[Mustafa Altun]]
 
−
|- valign="top"
 
−
| '''presented&nbsp;at''':
 
−
| width="550"| [http://www.date-conference.com/ Design, Automation and Test in Europe (DATE)], Florence, Italy, 2019.
 
−
|}
 
−
| align=center width="70" |
 
−
<span class="plainlinks">
 
−
[[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/f/fe/Aksoy_Altun_SAT_based_Synthesis_of_Switching_Lattices.pdf]]</span>
 
−
<br>
 
−
[[Media:Aksoy_Altun_SAT_based_Synthesis_of_Switching_Lattices.pdf | Paper]]
 
−
| align="center" width="70" |
 
−
<span class="plainlinks">
 
−
 
−
[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/5/54/Aksoy_Altun_SAT_based_Synthesis_of_Switching_Lattices.pptx]]
 
−
</span>
 
−
<br> [http://www.ecc.itu.edu.tr/images/5/54/Aksoy_Altun_SAT_based_Synthesis_of_Switching_Lattices.pptx Slides]
 
−
|}
 
−
 
−
{| style="border:2px solid #abd5f5; background:#f1f5fc;"
 
−
|
 
−
{|
 
−
|- valign=top
 
−
| width="100" |'''title''':
 
−
| width="624"|[[Media:Morgul_Altun_Algorithms_for_Switching_Lattices.pdf | Optimal and Heuristic Algorithms to Synthesize Lattices of Four-Terminal Switches]]
 
−
|- valign="top"
 
−
| '''authors''':
 
−
| Ceylan Morgul and [[Mustafa Altun]]
 
−
|- valign="top"
 
−
| '''appeared&nbsp;in''':
 
−
| width="624" | [http://www.journals.elsevier.com/integration Integration, the VLSI Journal],  Vol. 64, pp. 60&ndash;70, 2019.
 
−
|}
 
−
| align=center width="70" |
 
−
<span class="plainlinks">
 
−
[[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/5/58/Morgul_Altun_Algorithms_for_Switching_Lattices.pdf]]</span>
 
−
<br>
 
−
[[Media:Morgul_Altun_Algorithms_for_Switching_Lattices.pdf | Paper]]
 
−
|}
 
  
 
{| style="border:2px solid #abd5f5; background:#f1f5fc;"
 
{| style="border:2px solid #abd5f5; background:#f1f5fc;"
Line 568: Line 659:
 
</span>
 
</span>
 
<br> [http://www.ecc.itu.edu.tr/images/1/1a/Morgul_Altun_Synthesis_and_Optimization_of_Switching_Nanoarrays.pptx Slides]
 
<br> [http://www.ecc.itu.edu.tr/images/1/1a/Morgul_Altun_Synthesis_and_Optimization_of_Switching_Nanoarrays.pptx Slides]
−
|}
 
−
 
−
{| style="border:2px solid #abd5f5; background:#f1f5fc;"
 
−
|
 
−
{|
 
−
|- valign=top
 
−
| width="100" |'''title''':
 
−
| width="624"|[[Media:Altun_Riedel_Logic_Synthesis_for_Switching_Lattices.pdf | Logic Synthesis for Switching Lattices]]
 
−
|- valign="top"
 
−
| '''authors''':
 
−
| [[Mustafa Altun]] and Marc Riedel
 
−
|- valign="top"
 
−
| '''appeared&nbsp;in''':
 
−
| [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12 IEEE Transactions on Computers], Vol. 61, Issue 11, pp. 1588&ndash;1600, 2012.
 
−
<!-- |- valign="top"
 
−
| '''presented&nbsp;at''':
 
−
| width="624"| [http://fias.uni-frankfurt.de International Conference on Computational Modelling of Nanostructured Materials (ICCMNM)-FIAS], Frankfurt, Germany, 2013. -->
 
−
|}
 
−
| align=center width="70" |
 
−
<span class="plainlinks">
 
−
[[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/c/ca/Altun_Riedel_Logic_Synthesis_for_Switching_Lattices.pdf]]</span>
 
−
<br>
 
−
[[Media:Altun_Riedel_Logic_Synthesis_for_Switching_Lattices.pdf | Paper]]
 
−
|}
 
−
 
−
{| style="border:2px solid #abd5f5; background:#f1f5fc;"
 
−
|
 
−
{|
 
−
|- valign=top
 
−
| width="100" |'''title''':
 
−
| width="550"|[[Media:Altun_Riedel_Lattice-Based_Computation_of_Boolean_Functions.pdf | Lattice Based Computation of Boolean Functions]]
 
−
|- valign="top"
 
−
| '''authors''':
 
−
| [[Mustafa Altun]] and Marc Riedel
 
−
|- valign="top"
 
−
| '''presented&nbsp;at''':
 
−
| [http://www.dac.com IEEE/ACM Design Automation Conference (DAC)], Anaheim, USA, 2010.
 
−
|}
 
−
| align=center width="70" |
 
−
<span class="plainlinks">
 
−
[[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/7/7b/Altun_Riedel_Lattice-Based_Computation_of_Boolean_Functions.pdf]]</span>
 
−
<br>
 
−
[[Media:Altun_Riedel_Lattice-Based_Computation_of_Boolean_Functions.pdf | Paper]]
 
−
| align="center" width="70" |
 
−
<span class="plainlinks">
 
−
 
−
[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/2/28/Altun_Riedel_Lattice-Based_Computation_of_Boolean_Functions.ppt]]
 
−
</span>
 
−
<br> [http://www.ecc.itu.edu.tr/images/2/28/Altun_Riedel_Lattice-Based_Computation_of_Boolean_Functions.ppt Slides]
 
−
|}
 
−
 
−
==== National Publications in Turkish ====
 
−
 
−
{| style="border:2px solid #abd5f5; background:#f1f5fc;"
 
−
 
−
|
 
−
{|
 
−
|- valign=top
 
−
| width="100" |'''title''':
 
−
| width="550"|[[Media:Morgul_Altun_Anahtarlamali_Nano_Dizinler_ile_Lojik_Devre_Tasarimi_ve_Boyut_Optimizasyonu.pdf | Logic Circuit Design with Switching Nano Arrays and Area Optimization]]
 
−
|- valign="top
 
−
| width="100" |'''title (in Turkish)''':
 
−
| width="550"|[[Media:Morgul_Altun_Anahtarlamali_Nano_Dizinler_ile_Lojik_Devre_Tasarimi_ve_Boyut_Optimizasyonu.pdf | Anahtarlamalı Nano Dizinler ile Lojik Devre Tasarımı ve Boyut Optimizasyonu]]
 
−
|- valign="top
 
−
| '''authors''':
 
−
| Ceylan Morgul and [[Mustafa Altun]]
 
−
|- valign="top"
 
−
| '''presented at''':
 
−
| width="550"| [http://www.eleco.org.tr/ Elektrik, Elektronik, Bilgisayar ve Biyomedikal Mühendisliği Sempozyumu (ELECO)], Bursa, Turkey, 2014.
 
−
|}
 
−
 
−
| align=center width="70" |
 
−
<span class="plainlinks">
 
−
 
−
[[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/9/99/Morgul_Altun_Anahtarlamali_Nano_Dizinler_ile_Lojik_Devre_Tasarimi_ve_Boyut_Optimizasyonu.pdf]]</span>
 
−
<br>
 
−
[[Media:Morgul_Altun_Anahtarlamali_Nano_Dizinler_ile_Lojik_Devre_Tasarimi_ve_Boyut_Optimizasyonu.pdf  | Paper]]
 
−
 
−
| align="center" width="70" |
 
−
<span class="plainlinks">
 
−
 
−
[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/a/aa/Morgul_Altun_Anahtarlamali_Nano_Dizinler_ile_Lojik_Devre_Tasarimi_ve_Boyut_Optimizasyonu.pptx]]
 
−
</span>
 
−
<br> [http://www.ecc.itu.edu.tr/images/a/aa/Morgul_Altun_Anahtarlamali_Nano_Dizinler_ile_Lojik_Devre_Tasarimi_ve_Boyut_Optimizasyonu.pptx Slides]
 
 
|}
 
|}
  

Revision as of 13:41, 21 May 2020

Listed below are the papers, first authored by our group members as an indication that the related research is mainly conducted in our group, and the presentations. Research topics are ordered from newest to oldest as well as by considering their importance. Under each topic, papers are ordered from newest to oldest. All materials are subject to copyrights.

Contents

Computing with Switching Lattices

Technology Development

title: CMOS Implementation of Switching Lattices
authors: Ismail Cevik, Levent Aksoy, and Mustafa Altun
presented at: Design, Automation, and Test in Europe (DATE), Grenoble, France, 2020.

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title: Realization of Four-Terminal Switching Lattices: Technology Development and Circuit Modeling
authors: Serzat Safaltin, Oguz Gencer, Ceylan Morgul, Levent Aksoy, Sebahattin Gurmen, Csaba Andras Moritz, and Mustafa Altun
presented at: Design, Automation and Test in Europe (DATE), Florence, Italy, 2019.

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Performance Optimization

Logic Synthesis

title: A Novel Method for the Realization of Complex Logic Functions Using Switching Lattices
authors: Levent Aksoy and Mustafa Altun
presented at: IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain, 2020.

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Poster

title: Novel Methods for Efficient Realization of Logic Functions Using Switching Lattices
authors: Levent Aksoy and Mustafa Altun
appeared in: IEEE Transactions on Computers, Vol. 69, Issue 3, pp. 427–440, 2020.

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Paper

title: A Satisfiability-Based Approximate Algorithm for Logic Synthesis Using Switching Lattices
authors: Levent Aksoy and Mustafa Altun
presented at: Design, Automation and Test in Europe (DATE), Florence, Italy, 2019.

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title: Optimal and Heuristic Algorithms to Synthesize Lattices of Four-Terminal Switches
authors: Ceylan Morgul and Mustafa Altun
appeared in: Integration, the VLSI Journal, Vol. 64, pp. 60–70, 2019.

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Paper

title: Logic Synthesis for Switching Lattices
authors: Mustafa Altun and Marc Riedel
appeared in: IEEE Transactions on Computers, Vol. 61, Issue 11, pp. 1588–1600, 2012.

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Paper

title: Lattice Based Computation of Boolean Functions
authors: Mustafa Altun and Marc Riedel
presented at: IEEE/ACM Design Automation Conference (DAC), Anaheim, USA, 2010.

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National Publications in Turkish

title: Logic Circuit Design with Switching Nano Arrays and Area Optimization
title (in Turkish): Anahtarlamalı Nano Dizinler ile Lojik Devre Tasarımı ve Boyut Optimizasyonu
authors: Ceylan Morgul and Mustafa Altun
presented at: Elektrik, Elektronik, Bilgisayar ve Biyomedikal Mühendisliği Sempozyumu (ELECO), Bursa, Turkey, 2014.

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Computing with Nano-Crossbar Arrays

Comprehensive Performance Optimization

title: Nano-Crossbar based Computing: Lessons Learned and Future Directions
authors: Mustafa Altun, Ismail Cevik, Ahmet Erten, Osman Eksik, Mircea Stan, and Csaba Andras Moritz
presented at: Design, Automation, and Test in Europe (DATE), Grenoble, France, 2020.

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title: Integrated Synthesis Methodology for Crossbar Arrays
authors: Ceylan Morgul, Luca Frontini, Onur Tunali, Ioana Vatajelu, Valentina Ciriani, Lorena Anghel, Csaba Moritz, Mircea Stan, Dan Alexandrescu, and Mustafa Altun
presented at: IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), Athens, Greece, 2018.

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title: Logic Synthesis and Defect Tolerance for Memristive Crossbar Arrays
authors: Onur Tunali and Mustafa Altun
presented at: Design, Automation and Test in Europe (DATE), Dresden, Germany, 2018.

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title: Logic Synthesis and Testing Techniques for Switching Nano-Crossbar Arrays
authors: Dan Alexandrescu, Mustafa Altun, Lorena Anghel, Anna Bernasconi, Valentina Ciriani, Luca Frontini, and Mehdi Tahoori
appeared in: Microprocessors and Microsystems, Vol. 54, pp. 14–25, 2017.

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Paper

title: Computing with Nano-Crossbar Arrays: Logic Synthesis and Fault Tolerance
authors: Mustafa Altun, Valentina Ciriani, and Mehdi Tahoori
presented at: Design, Automation and Test in Europe (DATE), Lausanne, Switzerland, 2017.

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title: Synthesis and Performance Optimization of a Switching Nano-crossbar Computer
authors: Dan Alexandrescu, Mustafa Altun, Lorena Anghel, Anna Bernasconi, Valentina Ciriani, and Mehdi Tahoori
presented at: Euromicro Conference on Digital System Design (DSD), Limassol, Cyprus, 2016.

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Paper

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title: Power-Delay-Area Performance Modeling and Analysis for Nano-Crossbar Arrays
authors: Ceylan Morgul, Furkan Peker, and Mustafa Altun
presented at: IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Pittsburgh, USA, 2016.

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Poster

Fault/Defect/Variation Tolerance

title: A Fast Logic Mapping Algorithm for Multiple-type-Defect Tolerance in Reconfigurable Nano-Crossbar Arrays
authors: Onur Tunali and Mustafa Altun
appeared in: IEEE Transactions on Emerging Topics in Computing, Vol. 7, Issue 4, pp. 518–529, 2019.

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Paper

title: Defect Tolerant Logic Synthesis for Memristor Crossbars with Performance Evaluation
authors: Onur Tunali, Ceylan Morgul, and Mustafa Altun
appeared in: IEEE Micro, Vol. 38, Issue 5, pp. 22–31, 2018.

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Paper

title: A Fast Hill Climbing Algorithm for Defect and Variation Tolerant Logic Mapping of Nano-Crossbar Arrays
authors: Furkan Peker and Mustafa Altun
appeared in: IEEE Transactions on Multi-Scale Computing Systems, Vol. 4, No. 4, pp. 522–532, 2018.

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Paper

title: Yield Analysis of Nano-Crossbar Arrays for Uniform and Clustered Defect Distributions
authors: Onur Tunali and Mustafa Altun
presented at: IEEE International Conference on Electronics Circuits and Systems (ICECS), Batumi, Georgia, 2017.

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title: A Survey of Fault Tolerance Algorithms for Reconfigurable Nano-Crossbar Arrays
authors: Onur Tunali and Mustafa Altun
appeared in: ACM Computing Surveys, Vol. 50, No. 6, Article 79, 2017.

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Paper

title: Permanent and Transient Fault Tolerance for Reconfigurable Nano-Crossbar Arrays
authors: Onur Tunali and Mustafa Altun
appeared in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 36, Issue 5, pp. 747–760, 2017.

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Paper

title: Defect Tolerance in Diode FET and Four-Terminal Switch Based Nano-Crossbar Arrays
authors: Onur Tunali and Mustafa Altun
presented at: IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), Boston, USA, 2015.

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title: Synthesizing Logic with Percolation in Nanoscale Lattices
authors: Mustafa Altun and Marc Riedel
appeared in: International Journal of Nanotechnology and Molecular Computation, Vol. 3, Issue 2, pp. 12–30, 2011.

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Paper

title: Nanoscale Digital Computation Through Percolation
authors: Mustafa Altun, Marc Riedel, and Claudia Neuhauser
presented at: IEEE/ACM Design Automation Conference (DAC), San Francisco, USA, 2009.

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Logic Synthesis

title: Synthesis and Optimization of Switching Nanoarrays
authors: Ceylan Morgul and Mustafa Altun
presented at: IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), Belgrade, Serbia, 2015.

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Energy Efficient ANN Hardware Implementation

title: Efficient Time-Multiplexed Realization of Feedforward Artificial Neural Networks
authors: Levent Aksoy, Sajjad Parvin, Mohammadreza Nojehdeh, and Mustafa Altun
presented at: IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain, 2020.

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Stochastic and Bit Stream Computing

title: From Stochastic to Bit Stream Computing: Accurate Implementation of Arithmetic Circuits and Applications in Neural Networks
authors: Ensar Vahapoglu and Mustafa Altun
appeared in: arXiv, 1805.06262, 2018.

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Paper

title: Sampling Based Random Number Generator for Stochastic Computing
authors: Burak Karadeniz and Mustafa Altun
presented at: IEEE International Conference on Electronics Circuits and Systems (ICECS), Batumi, Georgia, 2017.

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title: Accurate Synthesis of Arithmetic Operations with Stochastic Logic
authors: Ensar Vahapoglu and Mustafa Altun
presented at: IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Pittsburgh, USA, 2016.

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Paper

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Poster

National Publications in Turkish

title: Random Bit Shuffling Method for Reducing Error Rates in Stochastic Computing
title (in Turkish): Stokastik Hesaplamada Hata Oranlarını Azaltmak için Rastgele Bit Karıştırma Yöntemi
authors: Serter Yavuz and Mustafa Altun
presented at: Elektrik, Elektronik, Bilgisayar ve Biyomedikal Mühendisliği Sempozyum (ELECO), Bursa, Turkey, 2014.

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Approximate Computing

title: Efficient Hardware Implementation of Artificial Neural Networks Using Approximate Multiply-Accumulate Blocks
authors: Mohammadreza Nojehdeh, Levent Aksoy, and Mustafa Altun
presented at: IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Limassol, Cyprus, 2020.

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title: Systematic Synthesis of Approximate Adders and Multipliers with Accurate Error Calculations
authors: Mohammadreza Nojehdeh and Mustafa Altun
appeared in: Integration, the VLSI Journal, Vol. 70, pp. 99–107, 2020.

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Paper

title: Circuit Aware Approximate System Design with Case Studies in Image Processing and Neural Networks
authors: Tuba Ayhan and Mustafa Altun
appeared in: IEEE Access, Vol. 7, pp. 4726–4734, 2019.

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Paper

title: Approximate Fully Connected Neural Network Generation
authors: Tuba Ayhan and Mustafa Altun
presented at: International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Prague, Czech Republic, 2018.

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title: A Power Efficient System Design Methodology Employing Approximate Arithmetic Units
authors: Tuba Ayhan, Firat Kula, and Mustafa Altun
presented at: IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Bochum, Germany, 2017.

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National Publications in Turkish

title: Approximate Implementation of FIR Filters on FPGA
title (in Turkish): FPGA Üzerinde Yaklaşık FIR Süzgeç Tasarımı
authors: Firat Kula, Tuba Ayhan, and Mustafa Altun
presented at: Sinyal İşleme ve İletişim Uygulamaları Kurultayı (SİU), Izmir, Turkey, 2018.

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Large-Area Electronics

Transistor Fabrication

title: The Enhanced Electronic Properties of P3HT-WO3 Hybrid Thin Film Transistors
authors: Beyza Yedikardes, Fereshteh Ordokhani, Nihat Akkan, Ece Kurt, Esra Zayim, Nilgün Yavuz, and Mustafa Altun
presented at: International Conference on Advanced Nanomaterials (ANM), Aveiro, Portugal, 2019.

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Abstract

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Organic Transistor Modeling

title: Modeling and Parameter Extraction of OFET Compact Models Using Metaheuristics-Based Approach

authors: Nihat Akkan, Mustafa Altun, and Herman Sedef
appeared in: IEEE Access, Vol. 7, pp. 180438–180450, 2019.

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Paper

title: Parameter Extraction Method Using Hybrid Artificial Bee Colony Algorithm for an OFET Compact Model
authors: Nihat Akkan, Mustafa Altun, and Herman Sedef
presented at: International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Prague, Czech Republic, 2018.

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Reversible Computing

CMOS Fault Tolerance

title: Perfect Concurrent Fault Detection in CMOS Logic Circuits Using Parity Preservative Reversible Gates

authors: Sajjad Parvin and Mustafa Altun
appeared in: IEEE Access, Vol. 7, pp. 163939–163947, 2019.

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Paper

title: Implementation of CMOS Logic Circuits with Perfect Fault Detection Using Preservative Reversible Gates
authors: Sajjad Parvin and Mustafa Altun
presented at: IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS), Rhodes Island, Greece, 2019.

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Paper

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Poster

title: Exploiting Reversible Computing for Latent-Fault-Free Error Detecting/Correcting CMOS Circuits

authors: Mustafa Altun, Sajjad Parvin, and Husrev Cilasun
appeared in: IEEE Access, Vol. 6, pp. 74475–74484, 2018.

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Paper

title: A Novel Reversible Fault Tolerant Microprocessor Design in AMS 0.35um Process

authors: Husrev Cilasun and Mustafa Altun
appeared in: Istanbul University - Journal of Electrical & Electronics Engineering, Vol. 17, No. 1, pp. 3147–3154, 2017.

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Paper

Logic Synthesis

title: Fast Synthesis of Reversible Circuits using a Sorting Algorithm and Optimization
authors: Omercan Susam and Mustafa Altun
appeared in: Journal of Multiple-Valued Logic and Soft Computing, Vol. 29, Issue 1-2, pp. 1–23, 2017.

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Paper

title: An Efficient Algorithm to Synthesize Quantum Circuits and Optimization
authors: Omercan Susam and Mustafa Altun
presented at: IEEE International Conference on Electronics Circuits and Systems (ICECS), Marseille, France, 2014.

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National Publications in Turkish

title: Kuantum Devre Sentezi ve Optimizasyonu için Verimli bir Algoritma
authors: Omercan Susam and Mustafa Altun
presented at: Elektrik, Elektronik, Bilgisayar ve Biyomedikal Mühendisliği Sempozyumu (ELECO), Bursa, Turkey, 2014.

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Reliability of Electronic Products

title: Distinct Degradation Processes in ZnO Varistors: Reliability Analysis and Modeling with Accelerated AC Tests
authors: Hadi Yadavari and Mustafa Altun
appeared in: Turkish Journal of Electrical Engineering and Computer Sciences, Vol. 25, No. 4, pp. 3240–3252, 2017.

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Paper

title: A Change-Point based Reliability Prediction Model using Field Return Data
authors: Mustafa Altun and Vehbi Comert
appeared in: Reliability Engineering and System Safety, Vol. 156, pp. 175–184, 2016.

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Paper

title: Effects of ZnO Varistor Degradation on the Overvoltage Protection Mechanism of Electronic Boards
authors: Hadi Yadavari, Burak Sal, Mustafa Altun, Ertunc Erturk, and Baris Ocak
presented at: European Safety and Reliability Conference (ESREL), Zurich, Switzerland, 2015.

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title: Extensive Investigation of Calibrated Accelerated Life Testing (CALT) in Comparison with Classical Accelerated Life Testing (ALT)
authors: Burak Sal and Mustafa Altun
presented at: European Safety and Reliability Conference (ESREL), Zurich, Switzerland, 2015.

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title: Warranty Forecasting of Electronic Boards using Short-term Field Data
authors: Vehbi Comert, Mustafa Altun, Mustafa Nadar, and Ertunc Erturk
presented at: Reliability and Maintainability Symposium (RAMS), Palm Harbor, USA, 2015.

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title: Reliability Prediction of Electronic Boards by Analyzing Field Return Data
authors: Vehbi Comert, Hadi Yadavari, Mustafa Altun, and Ertunc Erturk
presented at: European Safety and Reliability Conference (ESREL), Wroclaw, Poland, 2014.

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National Publications in Turkish

title: A New Reliability Model for MOSFET Gate Oxide Breakdown
title (in Turkish): MOSFET Geçit Oksidi Kırılması için Yeni Bir Güvenilirlik Modeli
authors: Hasan Avci and Mustafa Altun
presented at: Elektrik, Elektronik, Bilgisayar ve Biyomedikal Mühendisliği Sempozyumu (ELECO), Bursa, Turkey, 2018.

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Analog Circuit Design

title: Low Input Resistance Current Buffer Stage Using a Controllable Positive Feedback Loop, and Applications of Current Conveyor Based Filters
authors: Dogus Gungordu, Mustafa Altun, and Ismail Cevik
appeared  in: AEU International Journal of Electronics and Communications, Vol. 82, pp. 58–65, 2017.

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Paper

title: Design of Positive Feedback Driven Current-Mode Amplifiers Z-Copy CDBA and CDTA and Filter Applications
authors: Ersin Alaybeyoglu, Arda Guney, Mustafa Altun, and Hakan Kuntman
appeared  in: Analog Integrated Circuits and Signal Processing, Vol. 81, Issue 1, pp. 109–120, 2014.

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Paper

title: Realisation of nth Order Current Transfer Function Employing ECCIIs and Application Examples
authors: Mustafa Altun, Hakan Kuntman, Shahram Minaei, and Onur Sayin
appeared  in: International Journal of Electronics, Vol. 96, Issue 11, pp. 1115–1126, 2009.

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Paper

title: Design of a Fully Differential Current Mode Operational Amplifier with Improved Input-Output Impedances and its Filter Applications
authors: Mustafa Altun and Hakan Kuntman
appeared  in: AEU International Journal of Electronics and Communications, Vol. 62, Issue 3, pp. 39–44, 2008.

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Paper

title: A High Drive Fully Differential Current Mode Operational Amplifier Providing High Output Impedance and Filter Application
authors: Mustafa Altun and Hakan Kuntman
presented  at: International Conference on Electrical and Electronics Engineering (ELECO), Bursa, Turkey, 2007.

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Paper

title: High CMRR Current Mode Operational Amplifier with a Novel Class AB Input Stage
authors: Mustafa Altun and Hakan Kuntman
presented  at: ACM Great Lakes Symposium on VLSI (GLSVLSI), Stresa, Italy, 2007.

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Paper

title: A Wideband CMOS Current Mode Operational Amplifier and its Use for Band Pass Filter Realization
authors: Mustafa Altun and Hakan Kuntman
presented  at: Applied Electronics (AE), Pilsen, Czech Republic, 2006.

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National Publications in Turkish

title: Yüksek Başarımlı Tümüyle Farksal Akım Modlu İşlemsel Kuvvetlendirici (COA) Tasarımı ve Tüm Geçiren Süzgeç Yapısında Kullanımı
authors: Mustafa Altun and Hakan Kuntman
presented at: Elektrik, Elektronik, Bilgisayar ve Biyomedikal Mühendisliği Sempozyumu (ELECO), Bursa, Turkey, 2006.

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Paper

title: Akım Modlu İşlemsel Kuvvetlendirici Tasarımı ve Uygulamaları
title: Design of a Current Mode Operational Amplifier and Its Applications
author: Mustafa Altun
thesis: MSc, Electronics Engineering, Istanbul Technical University, 2007.

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Thesis

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Discrete Mathematics

title: A Study on Monotone Self-dual Boolean Functions
authors: Mustafa Altun and Marc Riedel
appeared  in: Acta Mathematicae Applicatae Sinica - English Series, Vol. 33, Issue 1, pp. 43–52, 2017.

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Paper

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