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| | </span> | | </span> |
| | <br> [http://www.ecc.itu.edu.tr/images/2/28/Altun_Riedel_Lattice-Based_Computation_of_Boolean_Functions.ppt Slides] | | <br> [http://www.ecc.itu.edu.tr/images/2/28/Altun_Riedel_Lattice-Based_Computation_of_Boolean_Functions.ppt Slides] |
| | + | |} |
| | + | |
| | + | == Energy Efficient ANN Hardware Implementation == |
| | + | |
| | + | {| style="border:2px solid #abd5f5; background:#f1f5fc;" |
| | + | | |
| | + | {| |
| | + | |- valign=top |
| | + | | width="100" |'''title''': |
| | + | | width="550"|[[Media:Aksoy_Parvin_Nojehdeh_Altun_Time_Multiplexed_ANN_Implementation.pdf | Efficient Time-Multiplexed Realization of Feedforward Artificial Neural Networks]] |
| | + | |- valign="top" |
| | + | | '''authors''': |
| | + | | Levent Aksoy, Sajjad Parvin, Mohammadreza Nojehdeh, and [[Mustafa Altun]] |
| | + | |- valign="top" |
| | + | | '''presented at''': |
| | + | | [http://iscas2020.org/ IEEE International Symposium on Circuits and Systems (ISCAS)], Seville, Spain, 2020. |
| | + | |} |
| | + | | align=center width="70" | |
| | + | <span class="plainlinks"> |
| | + | [[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/e/eb/Aksoy_Parvin_Nojehdeh_Altun_Time_Multiplexed_ANN_Implementation.pdf]]</span> |
| | + | <br> |
| | + | [[Media:Aksoy_Parvin_Nojehdeh_Altun_Time_Multiplexed_ANN_Implementation.pdf | Paper]] |
| | + | | align="center" width="70" | |
| | + | <span class="plainlinks"> |
| | + | |
| | + | [[File:PPT.jpg|60px|link=]] |
| | + | </span> |
| | + | <br> Slides |
| | |} | | |} |
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| | </span> | | </span> |
| | <br> [http://www.ecc.itu.edu.tr/images/a/aa/Morgul_Altun_Anahtarlamali_Nano_Dizinler_ile_Lojik_Devre_Tasarimi_ve_Boyut_Optimizasyonu.pptx Slides] | | <br> [http://www.ecc.itu.edu.tr/images/a/aa/Morgul_Altun_Anahtarlamali_Nano_Dizinler_ile_Lojik_Devre_Tasarimi_ve_Boyut_Optimizasyonu.pptx Slides] |
| − | |}
| |
| − |
| |
| − | == Energy Efficient ANN Hardware Implementation ==
| |
| − |
| |
| − | {| style="border:2px solid #abd5f5; background:#f1f5fc;"
| |
| − | |
| |
| − | {|
| |
| − | |- valign=top
| |
| − | | width="100" |'''title''':
| |
| − | | width="550"|[[Media:Aksoy_Parvin_Nojehdeh_Altun_Time_Multiplexed_ANN_Implementation.pdf | Efficient Time-Multiplexed Realization of Feedforward Artificial Neural Networks]]
| |
| − | |- valign="top"
| |
| − | | '''authors''':
| |
| − | | Levent Aksoy, Sajjad Parvin, Mohammadreza Nojehdeh, and [[Mustafa Altun]]
| |
| − | |- valign="top"
| |
| − | | '''presented at''':
| |
| − | | [http://iscas2020.org/ IEEE International Symposium on Circuits and Systems (ISCAS)], Seville, Spain, 2020.
| |
| − | |}
| |
| − | | align=center width="70" |
| |
| − | <span class="plainlinks">
| |
| − | [[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/e/eb/Aksoy_Parvin_Nojehdeh_Altun_Time_Multiplexed_ANN_Implementation.pdf]]</span>
| |
| − | <br>
| |
| − | [[Media:Aksoy_Parvin_Nojehdeh_Altun_Time_Multiplexed_ANN_Implementation.pdf | Paper]]
| |
| − | | align="center" width="70" |
| |
| − | <span class="plainlinks">
| |
| − |
| |
| − | [[File:PPT.jpg|60px|link=]]
| |
| − | </span>
| |
| − | <br> Slides
| |
| | |} | | |} |
| | | | |