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| <div style="float:center; font-size:110%; font-weight:bold; clear:both; padding:0; margin:0.0em;">__TOC__</div> | | <div style="float:center; font-size:110%; font-weight:bold; clear:both; padding:0; margin:0.0em;">__TOC__</div> |
| == Computing with Nano-Crossbar Arrays == | | == Computing with Nano-Crossbar Arrays == |
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| + | {| style="border:2px solid #abd5f5; background:#f1f5fc;" |
| + | | |
| + | {| |
| + | |- valign=top |
| + | | width="100" |'''title''': |
| + | | width="550"|[[Media:Tunali_Altun_Defect_Tolerance_in_Diode_FET_and_Four-Terminal_Switch_based_Nano-Crossbar_Arrays.pdf | Defect Tolerance in Diode FET and Four-Terminal Switch Based Nano-Crossbar Arrays]] |
| + | |- valign="top" |
| + | | '''authors''': |
| + | | width="550"| Ceylan Morgul, Luca Frontini, Onur Tunali, Ioana Vatajelu, Valentina Ciriani, Lorena Anghel, Csaba Moritz, Mircea Stan, Dan Alexandrescu, and [[Mustafa Altun]] |
| + | |- valign="top" |
| + | | '''presented at''': |
| + | | width="550"|[http://www.nanoarch.org/ IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)], Athens, Greece, 2018. |
| + | |} |
| + | | align=center width="70" | |
| + | <span class="plainlinks"> |
| + | [[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/b/b1/Morgul_EtAl_Integrated_Synthesis_Methodology for_Crossbar_Arrays.pdf]]</span> |
| + | <br> |
| + | [[Media:Morgul_EtAl_Integrated_Synthesis_Methodology for_Crossbar_Arrays.pdf | Paper]] |
| + | | align="center" width="70" | |
| + | <span class="plainlinks"> |
| + | |
| + | [[File:PPT.jpg|60px|link=]] |
| + | </span> |
| + | <br> Slides |
| + | |} |
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| {| style="border:2px solid #abd5f5; background:#f1f5fc;" | | {| style="border:2px solid #abd5f5; background:#f1f5fc;" |