EEF 205E
From The Emerging Circuits and Computation Group at ITU
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== Announcements == | == Announcements == | ||
| − | + | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Oct. 4th</span> The class is given in the room '''6309''' (third floor), EEF. | |
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| − | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Oct. | + | |
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== Syllabus == | == Syllabus == | ||
| − | <div style="font-size: 120%;"> ''' | + | <div style="font-size: 120%;"> '''EEF 205E: Introduction to Logic Design''', CRN: 15211, Fridays 8:30-11:30, Room: 6309 (EEF), Fall 2023. </div> |
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| <div style="font-size: 120%;"> '''Grading'''</div> | | <div style="font-size: 120%;"> '''Grading'''</div> | ||
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* Homeworks: '''10%''' | * Homeworks: '''10%''' | ||
** 4 homeworks (2.5% each) | ** 4 homeworks (2.5% each) | ||
| − | * Midterm Exams: ''' | + | * Midterm Exams: '''50%''' |
** 2 midterms (20% each) during the lecture time that will on '''19/11/2021''' and '''24/12/2021'''. | ** 2 midterms (20% each) during the lecture time that will on '''19/11/2021''' and '''24/12/2021'''. | ||
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* Homeworks are due at the beginning of class. Late homeworks will be downgraded by '''20%''' for each day passed the due date. | * Homeworks are due at the beginning of class. Late homeworks will be downgraded by '''20%''' for each day passed the due date. | ||
* Exams are in '''closed-notes''' and '''closed-books''' format. | * Exams are in '''closed-notes''' and '''closed-books''' format. | ||
| − | * To be eligible of taking the final or the resit exam, | + | * To be eligible of taking the final or the resit exam, your average, excluding the final, should be at least '''40%''' of the class average. |
| + | * To pass the class, your overall average should be at least '''50%''' of the class average. | ||
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Revision as of 12:54, 4 October 2023
Contents |
Announcements
- Oct. 4th The class is given in the room 6309 (third floor), EEF.
Syllabus
EEF 205E: Introduction to Logic Design, CRN: 15211, Fridays 8:30-11:30, Room: 6309 (EEF), Fall 2023.
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Instructor
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| Teaching Assistant
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Emre Altuner
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| Grading
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| Textbook
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| Reference Books
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| Policies
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Weekly Course Plan
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Date
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Topic
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| Week 1, 8/10/2021 | Introduction |
| Week 2, 15/10/2021 | Digital logic fundamentals: gates, combinational circuits, Boolean expressions |
| Week 3, 22/10/2021 | Digital logic fundamentals: truth tables, two-level forms (AND/OR/NAND/NOR), "don't cares" |
| Weeks 4, 29/10/2021 | HOLIDAY! |
| Weeks 5, 5/11/2021 | Logic minimization: Karnaugh maps, Quine-McCluskey method |
| Week 6, 12/11/2021 | Combinational circuit design: building blocks (adders, multiplexers, decoders, etc.) |
| Weeks 7, 19/11/2021 | MIDTERM I |
| Week 8, 26/11/2021 | HOLIDAY, no class |
| Week 9, 3/12/2021 | Combinational circuit design: implementing Boolean and arithmetic operations |
| Weeks 10, 10/12/2021 | Area-Delay Performance analysis of combinational circuits |
| Week 11, 17/12/2021 | Sequential circuits: latches & flip-flops |
| Week 12, 24/12/2021 | MIDTERM II |
| Weeks 13, 31/12/2021 | Sequential circuit design: state graphs and tables, modules |
| Weeks 14, 7/1/2022 | Sequential circuit design: modules, state machines |
| Weeks 15, 14/1/2022 | Sequential circuit design: modules, state machines |
Course Materials
| Homeworks & Solutions | Homeworks & Solutions | Quizzes & Solutions | Sample Problems & Solutions | Exams |
|---|---|---|---|---|
| Homework 1 & Solutions | Homework 3 & Solutions | Quiz 1 & Solutions | Problem Set 1 & Solutions | Midterm 1 & Solutions |
| Homework 2 | Homework 4 & Solutions | Quiz 2 & Solutions | Problem Set 2 & Solutions | Midterm 2 & Solutions |
