EHB 322E-M

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== Announcements ==
 
== Announcements ==
  
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Feb. 18th</span> [[Media:ehb322e-2019-spring-hw-01.pdf | '''The first homework''']] has been posted that is due 04/03/2019 (before the lecture).
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* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> June 1st</span> To see your grades [[Media:ehb322e-M-2021-spring-grades.pdf | ''' click here''']].
 
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* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Apr. 29th</span> [[Media:ehb322e-2021-spring-hw-02.pdf | '''The second homework''']] has been posted that is due 20/05/2021 (before 9:30).
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Feb. 1st</span>  As a simulation tool, Spice is required for homeworks. Among different Spice-based programs, '''LTspice''' is a good and free choice; you can download it by [http://www.linear.com/designtools/software/#LTspice/ '''clicking here'''].
+
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Mar. 25th</span> [[Media:ehb322e-2021-spring-hw-01.pdf | '''The first homework''']] has been posted that is due 08/04/2021 (before 9:30).
 +
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Mar. 7th</span> Lectures are given online using Zoom that can be accessed via [http://ninova.itu.edu.tr/tr/ Ninova].
 +
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Mar. 7th</span>  As a simulation tool, Spice is required for homeworks. Among different Spice-based programs, '''LTspice''' is a good and free choice; you can download it by [http://www.linear.com/designtools/software/#LTspice/ '''clicking here'''].
  
 
== Syllabus ==
 
== Syllabus ==
<div style="font-size: 120%;"> '''EHB 322E: Digital Electronic Circuits''', CRN: 20973, Mondays 13:30-16:30, Room: 5207 (EEF), Spring 2019. </div>  
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<div style="font-size: 120%;"> '''EHB 322E: Digital Electronic Circuits''', CRN: 25205, Mondays 12:30-15:30, Online using Zoom via Ninova, Spring 2021. </div>  
 
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{| border="1" cellspacing="0" cellpadding="5" " width="80%"
 
    
 
    
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* Email: altunmus@itu.edu.tr
 
* Email: altunmus@itu.edu.tr
 
* Tel: 02122856635
 
* Tel: 02122856635
* Office hours: 15:00 – 16:30 on Tuesdays in Room:3005, EEF
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* Office hours: 15:00 – 16:30 online via email or online talk
 
|-  
 
|-  
 
| <div style="font-size: 120%;"> '''Teaching Assistant'''</div>
 
| <div style="font-size: 120%;"> '''Teaching Assistant'''</div>
 
         ||  
 
         ||  
  
Alican Çağlar
+
Sadık İlik
* Email: caglara@itu.edu.tr
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* Email: iliks@itu.edu.tr
* Room: 2311 EEF  
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* Room: 3105 EEF  
  
 
|-  
 
|-  
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         ||  
 
         ||  
  
* Quizzes: '''10%'''
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* Quizzes: '''60%'''
** 2 pop-up quizzes (5% each) - '''no''' prior announcement of quiz dates and times
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** 3 quizzes (20% each) during the lecture time that will on '''5/4/2021''', '''3/5/2021''', and '''7/6/2021'''.
  
 
* Homeworks: '''10%'''
 
* Homeworks: '''10%'''
** 3 homeworks (3.3% each)
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** 2 homeworks (5% each)
  
* Midterm Exams: '''40%'''
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* Final Exam: '''30%'''
** 2 midterms (20% each) during the lecture time that will on '''18/3/2019''' and '''29/4/2019'''.
+
  
* Final Exam: '''40%'''
 
 
|-
 
|-
 
|  <div style="font-size: 120%;"> '''Reference Books'''</div>
 
|  <div style="font-size: 120%;"> '''Reference Books'''</div>
 
         ||  
 
         ||  
 +
* Weste, N., & Harris, D. (20XX). Integrated Circuit Design: International Version: A Circuits and Systems Perspective. Pearson Education,.
 
* Rabaey, J. M., Chandrakasan, A. P., & Nikolic, B. (20XX). Digital integrated circuits. Englewood Cliffs: Prentice hall.
 
* Rabaey, J. M., Chandrakasan, A. P., & Nikolic, B. (20XX). Digital integrated circuits. Englewood Cliffs: Prentice hall.
 
* Uyemura, J. P. (20XX). CMOS logic circuit design. Springer.
 
* Uyemura, J. P. (20XX). CMOS logic circuit design. Springer.
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* Homeworks are due at the beginning of class. Late homeworks will be downgraded by '''20%''' for each day passed the due date.
 
* Homeworks are due at the beginning of class. Late homeworks will be downgraded by '''20%''' for each day passed the due date.
* Quizzes and exams are in '''closed-notes''' and '''closed-books''' format.
+
* Exams are in '''closed-notes''' and '''closed-books''' format.
* To be eligible of taking the final or the resit exam, your midterm average should be at least '''25''' (out of 100).
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* To be eligible of taking the final exam, your average excluding the final exam should be at least '''50%''' of the class average.
 
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|| <div style="font-size: 120%;"> '''Topic'''</div>
 
|| <div style="font-size: 120%;"> '''Topic'''</div>
 
|-  
 
|-  
|  Week  1, 4/2/2019      || No class
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|  Week  1, 1/3/2021      || Introduction
 
|-  
 
|-  
|  Week  2, 11/2/2019      || Introduction
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|  Week  2, 8/3/2021      || Switching theory & devices for digital circuits and inverters
 
|-  
 
|-  
Week  3, 18/2/2019      || Switching theory & devices for digital circuits and inverters
+
Weeks 3, 15/3/2021 || NMOS/CMOS inverters & their static and dynamic behaviors
|-
+
|  Weeks 4, 25/2/2019 || NMOS/CMOS inverters & their static and dynamic behaviors
+
 
|-
 
|-
|  Weeks 5, 4/3/2019   || Optimization of multiple-stage inverters and buffers  
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|  Weeks 4, 22/3/2021   || Optimization of multiple-stage inverters and buffers  
 
|-
 
|-
|  Week 6, 11/3/2019     || Static logic gates and area-delay-power performance analysis
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|  Week 5, 29/3/2021     || Static and complex logic gates and their area-delay-power performance analysis
 
|-  
 
|-  
|  Weeks 7, 18/3/2019   || MIDTERM I
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|  Weeks 6, 5/4/2021   || Recitation and QUIZ
|-
+
|-  
|  Week  8, 25/3/2019     || HOLIDAY, no class  
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|  Week  7, 12/4/2021     || Pass transistor logic with Shannon's expansion and performance analysis
 +
|-
 +
|  Week  8, 19/4/2021  || Dynamic logic gates, synchronization
 
|-  
 
|-  
Week  9, 1/4/2019  ||  Complex logic gates and their delays
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Weeks 9, 26/4/2021 ||  Dynamic logic gates performance analysis
 
|-  
 
|-  
Weeks 10, 8/4/2019 ||  Pass transistor logic with Shannon's expansion and performance analysis
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Week  10, 3/5/2021      ||  Recitation and QUIZ
 
|-  
 
|-  
|  Week  11, 15/4/2019      || Dynamic logic gates, synchronization, and performance analysis
+
|  Week  10, 10/5/2021    || HOLIDAY, no class 
 
|-  
 
|-  
Week  12, 22/4/2019    || Static and dynamic memory elements: D, SR, and JK flip-flops   
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Weeks 12, 17/5/2021 || Static and dynamic memory elements: D, SR, and JK flip-flops   
 
|-  
 
|-  
|  Weeks 13, 29/4/2019 || MIDTERM II 
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|  Weeks 13, 24/5/2021 || Synchronization and timing analysis of digital circuits having logic and memory elements
 
|-  
 
|-  
Weeks 14, 6/5/2019 || Synchronization and timing analysis of digital circuits having logic and memory elements
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Week  14, 31/5/2021      || Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories
 
|-  
 
|-  
|  Weeks 15, 13/5/2019 || Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories
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|  Weeks 15, 7/6/2021 || Recitation and QUIZ
 
|}
 
|}
  
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! Homeworks  & Solutions!! Quizzes & Solutions!! Exams
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! Quizzes & Solutions!! Homeworks & Solutions!! Course Materials
 
|-  
 
|-  
| || ||   
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| [[Media:ehb322e-M-2021-spring-quiz-01.pdf | Quiz 1]] & [[Media:ehb322e-M-2021-spring-quiz-01-solutions.pdf | Solutions]]    || [[Media:ehb322e-2021-spring-hw-01.pdf | Homework 1]] & [[Media:ehb322e-2021-spring-hw-01-solutions.pdf | Solutions]]  ||  [[Media:ehb322e-2020-spring-lecture-notes.zip | Lecture Notes]]
 
|-  
 
|-  
|  ||    ||   
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[[Media:ehb322e-M-2021-spring-quiz-02.pdf | Quiz 2]] & [[Media:ehb322e-M-2021-spring-quiz-02-solutions.pdf | Solutions]]   || [[Media:ehb322e-2021-spring-hw-02.pdf | Homework 2]] & [[Media:ehb322e-2021-spring-hw-02-solutions.pdf | Solutions]] ||   
 
|-
 
|-
| ||  ||   
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| [[Media:ehb322e-M-2021-spring-quiz-03.pdf | Quiz 3]] & [[Media:ehb322e-M-2021-spring-quiz-03-solutions.pdf | Solutions]]    ||  ||  
 +
   
 
|}
 
|}

Latest revision as of 15:42, 18 June 2021

Contents

[edit] Announcements

  • June 1st To see your grades click here.
  • Apr. 29th The second homework has been posted that is due 20/05/2021 (before 9:30).
  • Mar. 25th The first homework has been posted that is due 08/04/2021 (before 9:30).
  • Mar. 7th Lectures are given online using Zoom that can be accessed via Ninova.
  • Mar. 7th As a simulation tool, Spice is required for homeworks. Among different Spice-based programs, LTspice is a good and free choice; you can download it by clicking here.

[edit] Syllabus

EHB 322E: Digital Electronic Circuits, CRN: 25205, Mondays 12:30-15:30, Online using Zoom via Ninova, Spring 2021.
Instructor

Mustafa Altun

  • Email: altunmus@itu.edu.tr
  • Tel: 02122856635
  • Office hours: 15:00 – 16:30 online via email or online talk
Teaching Assistant

Sadık İlik

  • Email: iliks@itu.edu.tr
  • Room: 3105 EEF
Grading
  • Quizzes: 60%
    • 3 quizzes (20% each) during the lecture time that will on 5/4/2021, 3/5/2021, and 7/6/2021.
  • Homeworks: 10%
    • 2 homeworks (5% each)
  • Final Exam: 30%
Reference Books
  • Weste, N., & Harris, D. (20XX). Integrated Circuit Design: International Version: A Circuits and Systems Perspective. Pearson Education,.
  • Rabaey, J. M., Chandrakasan, A. P., & Nikolic, B. (20XX). Digital integrated circuits. Englewood Cliffs: Prentice hall.
  • Uyemura, J. P. (20XX). CMOS logic circuit design. Springer.
  • Kang, S. M., & Leblebici, Y. (20XX). Cmos Digital Integrated Circuits. McGraw-Hill Education.
Policies
  • Homeworks are due at the beginning of class. Late homeworks will be downgraded by 20% for each day passed the due date.
  • Exams are in closed-notes and closed-books format.
  • To be eligible of taking the final exam, your average excluding the final exam should be at least 50% of the class average.

[edit] Weekly Course Plan

Date
Topic
Week 1, 1/3/2021 Introduction
Week 2, 8/3/2021 Switching theory & devices for digital circuits and inverters
Weeks 3, 15/3/2021 NMOS/CMOS inverters & their static and dynamic behaviors
Weeks 4, 22/3/2021 Optimization of multiple-stage inverters and buffers
Week 5, 29/3/2021 Static and complex logic gates and their area-delay-power performance analysis
Weeks 6, 5/4/2021 Recitation and QUIZ
Week 7, 12/4/2021 Pass transistor logic with Shannon's expansion and performance analysis
Week 8, 19/4/2021 Dynamic logic gates, synchronization
Weeks 9, 26/4/2021 Dynamic logic gates performance analysis
Week 10, 3/5/2021 Recitation and QUIZ
Week 10, 10/5/2021 HOLIDAY, no class
Weeks 12, 17/5/2021 Static and dynamic memory elements: D, SR, and JK flip-flops
Weeks 13, 24/5/2021 Synchronization and timing analysis of digital circuits having logic and memory elements
Week 14, 31/5/2021 Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories
Weeks 15, 7/6/2021 Recitation and QUIZ

[edit] Course Materials

Quizzes & Solutions Homeworks & Solutions Course Materials
Quiz 1 & Solutions Homework 1 & Solutions Lecture Notes
Quiz 2 & Solutions Homework 2 & Solutions
Quiz 3 & Solutions
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