EHB 322E: Digital Electronic Circuits

From The Emerging Circuits and Computation Group at ITU
Jump to: navigation, search



  • Sept. 20th The class is performed physically (not virtually) in the room 5302 (third floor), EEF.
  • Sept. 19th As a simulation tool, Spice is required for homeworks. Among different Spice-based programs, LTspice is a good and free choice; you can download it by clicking here.


EHB 322E: Digital Electronic Circuits, CRN: 12020, Fridays 9:30-12:30, Room: 5302 EEF, Fall 2022.

Mustafa Altun

  • Email:
  • Tel: 02122856635
  • Office hours: 15:00 – 16:00 on Wednesdays in Room:3005, EEF (or stop by my office any time) or online talk
Teaching Assistant (s)

Mehmet Alperen Baltacı

  • Email:

Mehmet Berkay Kebapcıoğlu

  • Email:
  • Quizzes: 30%
    • 3 quizzes (10% each) - no prior announcement of quiz dates and times.
  • Homeworks: 10%
    • 2 homeworks (5% each)
  • Midterm Exam: 20%
    • 1 midterm during the lecture time that will on 9/12/2022.
  • Final Exam: 40%
Reference Books
  • Weste, N., & Harris, D. (20XX). Integrated Circuit Design: International Version: A Circuits and Systems Perspective. Pearson Education,.
  • Rabaey, J. M., Chandrakasan, A. P., & Nikolic, B. (20XX). Digital integrated circuits. Englewood Cliffs: Prentice hall.
  • Uyemura, J. P. (20XX). CMOS logic circuit design. Springer.
  • Kang, S. M., & Leblebici, Y. (20XX). Cmos Digital Integrated Circuits. McGraw-Hill Education.
  • Homeworks are due at the beginning of class. Late homeworks will be downgraded by 20% for each day passed the due date.
  • Exams are in closed-notes and closed-books format.
  • To be eligible of taking the final or the resit exam, your midterm and quiz weighted average should be at least 25 (out of 100).

Weekly Course Plan

Week 1, 23/9/2022 Introduction
Week 2, 30/9/2022 Switching theory & devices for digital circuits and inverters
Weeks 3, 7/10/2022 NMOS/CMOS inverters & their static and dynamic behaviors
Weeks 4, 14/10/2022 NMOS/CMOS inverters & their static and dynamic behaviors
Week 5, 21/10/2022 Optimization of multiple-stage inverters and buffers
Weeks 6, 28/10/2022 Static and complex logic gates and their area-delay-power performance analysis
Week 7, 4/11/2022 Static and complex logic gates and their area-delay-power performance analysis
Week 8, 11/11/2022 HOLIDAY!
Weeks 9, 18/11/2022 Pass transistor logic with Shannon's expansion and performance analysis
Week 10, 25/11/2022 Dynamic logic gates, synchronization
Week 11, 2/12/2022 Dynamic logic gates performance analysis
Weeks 12, 9/12/2022 MIDTERM
Weeks 13, 16/12/2022 Static and dynamic memory elements: D, SR, and JK flip-flops
Week 14, 23/12/2022 Synchronization and timing analysis of digital circuits having logic and memory elements
Weeks 15, 30/12/2022 Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories

Course Materials

Shared through Ninova.

Personal tools

ECC (In Turkish)