EHB 322E: Digital Electronic Circuits

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Contents

Announcements

  • Feb. 28th The class is given in the room 5203 (second floor), EEF.
  • Feb. 12st As a simulation tool, Spice is required for homeworks. Among different Spice-based programs, LTspice is a good and free choice; you can download it by clicking here.

Syllabus

EHB 322E: Digital Electronic Circuits, CRN: 22206, Mondays 12:30-15:30, Room: 5203 EEF, Spring 2024.
Instructor

Mustafa Altun

  • Email: altunmus@itu.edu.tr
  • Tel: 02122856635
  • Office hours: 15:00 – 16:00 on Wednesdays in Room:3005, EEF (or stop by my office any time) or online talk
Teaching Assistant

Yiğit Can Erçetin

  • Email: ercetin17@itu.edu.tr
Grading
  • Quizzes: 10%
    • 2 quizzes (5% each) - no prior announcement of quiz dates and times.
  • Homeworks: 10%
    • 2 homeworks (5% each)
  • Midterm Exams: 40%
    • 2 midterms (20% each) during the lecture time that will on 25/3/2024 and 29/4/2024.
  • Final Exam: 40%
Reference Books
  • Weste, N., & Harris, D. (20XX). Integrated Circuit Design: International Version: A Circuits and Systems Perspective. Pearson Education,.
  • Rabaey, J. M., Chandrakasan, A. P., & Nikolic, B. (20XX). Digital integrated circuits. Englewood Cliffs: Prentice hall.
  • Uyemura, J. P. (20XX). CMOS logic circuit design. Springer.
  • Kang, S. M., & Leblebici, Y. (20XX). Cmos Digital Integrated Circuits. McGraw-Hill Education.
Policies
  • Homeworks are due at the beginning of class. Late homeworks will be downgraded by 20% for each day passed the due date.
  • Exams are in closed-notes and closed-books format.
  • To be eligible of taking the final or the resit exam, you should take both midterms and your midterm average should be at least 25 (out of 100).
  • The final exam will be same exam for all sections.

Weekly Course Plan

Date
Topic
Week 1, 12/2/2024 Introduction
Week 2, 19/2/2024 Switching theory & devices for digital circuits and inverters
Weeks 3, 26/2/2024 NMOS/CMOS inverters & their static and dynamic behaviors
Weeks 4, 4/3/2024 NMOS/CMOS inverters & their static and dynamic behaviors
Week 5, 11/3/2024 Optimization of multiple-stage inverters and buffers
Weeks 6, 18/3/2024 Static and complex logic gates and their area-delay-power performance analysis
Week 7, 25/3/2024 MIDTERM I
Week 8, 1/4/2024 Pass transistor logic with Shannon's expansion and performance analysis
Weeks 9, 8/4/2024 HOLIDAY, no class
Week 10, 15/4/2024 Dynamic logic gates performance analysis
Week 11, 22/4/2024 Dynamic logic gates, synchronization
Weeks 12, 29/4/2024 MIDTERM II
Weeks 13, 6/5/2024 Static and dynamic memory elements: D, SR, and JK flip-flops
Week 14, 13/5/2024 Synchronization and timing analysis of digital circuits having logic and memory elements
Weeks 15, 20/5/2024 Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories

Course Materials

Shared through Ninova.

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