ELE 523E

From The Emerging Circuits and Computation Group at ITU
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'''Computational Nanoelectronics''', Mondays 13:30-16:30, Fall 2013.
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== Announcements ==
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* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Sept. 9</span>  The class is given in the room '''Z2''' (ground level), EEF.
  
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== Overview ==
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== Syllabus ==
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As current CMOS based technologies are approaching their anticipated limits, emerging nanotechnologies are replacing their role in electronic circuits.  This course overviews nanoscale electronics circuits in a comparison with those of conventional CMOS-based.  In this course, different emerging  computing models are investigated. Regarding the interdisciplinary nature of emerging technologies, this course is appropriate for graduate students in different majors including electronics engineering, control engineering, computer science, applied physics, and mathematics. No prior course is required; only basic (college-level) knowledge in circuit design and mathematics is assumed.  
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<div style="font-size: 120%;"> '''Computational Nanoelectronics''', Mondays 13:30-16:30, Room: Z2 (EEF), Fall 2013. </div>
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Topics that are covered include:
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{| border="1" cellspacing="0" cellpadding="5" " width="70%"
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| style="width: 20%;"|
  
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* Overview of nanoelectronics (in comparison with CMOS) including CMOL, nanowire arrays, single electron transistors, etc..
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<div style="font-size: 120%;"> '''Instructor'''</div>
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* Introduction of emerging computing models in circuit level.
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        ||
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* Analysis and synthesis of deterministic and probabilistic models.
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[[Mustafa Altun]]
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* Performance of the computing models regarding area, power, speed, and accuracy.
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* Email: altunmus@itu.edu.tr
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* Uncertainty and defects: defect tolerance techniques for permanent and transient errors.
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* Tel: 02122856635
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* Office hours: 13:30 – 15:00 on Tuesdays in Room:3005, EEF (or stop by my office any time)
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|-
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|  <div style="font-size: 120%;"> '''Grading'''</div>
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        ||
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* Homework: '''15%'''
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** 3 homeworks (5% each)
  
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----
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* Midterm Exam: '''25%'''
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'''Note:''' Details including syllabus, weekly course plan and grading are coming soon!
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** The midterm during the lecture time that will on '''25/11/2013'''.
  
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== Instructor ==
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* Presentation: '''20%'''
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** Presentations are made individually or in groups depending on class size.
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** Presentation topics will be posted.
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* Final Project: '''40%'''
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|-
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|  <div style="font-size: 120%;"> '''Reference Books'''</div>
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        ||
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* Zomaya, Y. (2006). Handbook of Nature-Inspired and Innovative Computing: Integrating Classical Models with Emerging Technologies, Springer.
  
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[[Mustafa Altun]]
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* Yanushkevich, S., Shmerko, V., Lyshevski, S. (2005). Logic Design of NanoICs, CRC Press.
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* Email: altunmus@itu.edu.tr
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* Tel: 02122856635
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* Adamatzky, A., Bull, L., Costello,  B.  L.,  Stepney, S., Teuscher, C. (2007). Unconventional Computing, Luniver Press.
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* Address: ITU EEF, Room 3005
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* Stanisavljević, M.,  Schmid, M, Leblebici, Y. (2010). Reliability  of Nanoscale Circuits and Systems: Methodologies and Circuit Architectures, Springer.
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* Sasao, T. (1999).  Switching Theory for Logic Synthesis, Springer.
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|-
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|  <div style="font-size: 120%;"> '''Policies'''</div>
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        ||
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* Homeworks are due at the beginning of class. Late homeworks will be downgraded by '''20%''' for each day passed the due date.
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* Collaboration is permitted and encouraged for homeworks, but each collaborator should turn in his/her own answers.
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* The midterm is in open-notes and open-books format.
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* Collaboration is '''not''' permitted for the final project.
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|}
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==Weekly Course Plan==
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{| border="1" cellspacing="0" cellpadding="5" " width="70%"
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| style="width: 20%;"|
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<div style="font-size: 120%;"> '''Date'''</div>
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|| <div style="font-size: 120%;"> '''Topic'''</div>
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|-
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|  Week  1, 16/9/2013      || Introduction
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|-
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|  Week  2, 23/9/2013      || Overview of emerging nanoscale devices and switches
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|-
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|  Week  3, 30/9/2013      || Deterministic computing models for nanoelectronic circuits
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|-
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|  Weeks 4, 7/10/2013  || Deterministic computing models for nanoelectronic circuits
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|-
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|  Weeks 5, 14/10/2013  || HOLIDAY!, no class
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|-
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|  Week 6, 21/10/2013      || Probabilistic computing models for nanoelectronic circuits
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|-
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|  Weeks 7, 28/10/2013  || Stochastic computation 
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|-
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|  Week  8, 4/11/2013      || Stochastic computation
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|-
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|  Week  9, 11/11/2013    || Defects and reliability in nanoelectronics
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|-
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|  Weeks 10, 18/11/2013 ||  Defect tolerance techniques
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|-
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|  Week  11, 25/11/2013      || MIDTERM
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|-
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|  Week  12, 2/12/2013    || Performance parameters (area, power, delay, and accuracy) and optimization
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|-
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|  Weeks 13, 9/12/2013 || Student presentations
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|-
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|  Weeks 14, 16/12/2013 || Student presentations
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|-
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|  Weeks 15, 23/12/2013 || Student presentations
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|}
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== Course Materials ==
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{| border="1" cellspacing="0" cellpadding="5"
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!Lecture Slides !! Homeworks !! Exams/Projects
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|-
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Revision as of 17:45, 12 September 2013

Contents

Announcements

  • Sept. 9 The class is given in the room Z2 (ground level), EEF.

Syllabus

Computational Nanoelectronics, Mondays 13:30-16:30, Room: Z2 (EEF), Fall 2013.
Instructor

Mustafa Altun

  • Email: altunmus@itu.edu.tr
  • Tel: 02122856635
  • Office hours: 13:30 – 15:00 on Tuesdays in Room:3005, EEF (or stop by my office any time)
Grading
  • Homework: 15%
    • 3 homeworks (5% each)
  • Midterm Exam: 25%
    • The midterm during the lecture time that will on 25/11/2013.
  • Presentation: 20%
    • Presentations are made individually or in groups depending on class size.
    • Presentation topics will be posted.
  • Final Project: 40%
Reference Books
  • Zomaya, Y. (2006). Handbook of Nature-Inspired and Innovative Computing: Integrating Classical Models with Emerging Technologies, Springer.
  • Yanushkevich, S., Shmerko, V., Lyshevski, S. (2005). Logic Design of NanoICs, CRC Press.
  • Adamatzky, A., Bull, L., Costello, B. L., Stepney, S., Teuscher, C. (2007). Unconventional Computing, Luniver Press.
  • Stanisavljević, M., Schmid, M, Leblebici, Y. (2010). Reliability of Nanoscale Circuits and Systems: Methodologies and Circuit Architectures, Springer.
  • Sasao, T. (1999). Switching Theory for Logic Synthesis, Springer.
Policies
  • Homeworks are due at the beginning of class. Late homeworks will be downgraded by 20% for each day passed the due date.
  • Collaboration is permitted and encouraged for homeworks, but each collaborator should turn in his/her own answers.
  • The midterm is in open-notes and open-books format.
  • Collaboration is not permitted for the final project.

Weekly Course Plan

Date
Topic
Week 1, 16/9/2013 Introduction
Week 2, 23/9/2013 Overview of emerging nanoscale devices and switches
Week 3, 30/9/2013 Deterministic computing models for nanoelectronic circuits
Weeks 4, 7/10/2013 Deterministic computing models for nanoelectronic circuits
Weeks 5, 14/10/2013 HOLIDAY!, no class
Week 6, 21/10/2013 Probabilistic computing models for nanoelectronic circuits
Weeks 7, 28/10/2013 Stochastic computation
Week 8, 4/11/2013 Stochastic computation
Week 9, 11/11/2013 Defects and reliability in nanoelectronics
Weeks 10, 18/11/2013 Defect tolerance techniques
Week 11, 25/11/2013 MIDTERM
Week 12, 2/12/2013 Performance parameters (area, power, delay, and accuracy) and optimization
Weeks 13, 9/12/2013 Student presentations
Weeks 14, 16/12/2013 Student presentations
Weeks 15, 23/12/2013 Student presentations

Course Materials

Lecture Slides Homeworks Exams/Projects
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