EHB 322E-T

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! Quizzes & Solutions!! Homeworks & Solutions!! Course Materials  
 
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| [[Media:ehb322e-T-2021-spring-quiz-01.pdf | Quiz 1]] & [[Media:ehb322e-T-2021-spring-quiz-01-solutions.pdf | Solutions]]    || [[Media:ehb322e-2021-spring-hw-01.pdf | Homework 1]] & [[Media:ehb322e-2021-spring-hw-01-solutions.pdf | Solutions]]  ||  [[Media:ehb322e-2020-spring-lecture-notes.zip | Lecture Notes]]  
 
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Revision as of 13:04, 1 June 2021

Contents

Announcements

  • Apr. 29th The second homework has been posted that is due 20/05/2021 (before 9:30).
  • Mar. 25th The first homework has been posted that is due 08/04/2021 (before 9:30).
  • Mar. 7th Lectures are given online using Zoom that can be accessed via Ninova.
  • Mar. 7th As a simulation tool, Spice is required for homeworks. Among different Spice-based programs, LTspice is a good and free choice; you can download it by clicking here.

Syllabus

EHB 322E: Digital Electronic Circuits, CRN: 22626, Thursdays 8:30-11:30, Online using Zoom via Ninova, Spring 2021.
Instructor

Mustafa Altun

  • Email: altunmus@itu.edu.tr
  • Tel: 02122856635
  • Office hours: 15:00 – 16:30 online via email or online talk
Teaching Assistant

Melih Bilmez

  • Email: bilmez@itu.edu.tr
  • Room: 3107 EEF
Grading
  • Quizzes: 60%
    • 3 quizzes (20% each) during the lecture time that will on 8/4/2021, 6/5/2021, and 10/6/2021.
  • Homeworks: 10%
    • 2 homeworks (5% each)
  • Final Exam: 30%
Reference Books
  • Weste, N., & Harris, D. (20XX). Integrated Circuit Design: International Version: A Circuits and Systems Perspective. Pearson Education,.
  • Rabaey, J. M., Chandrakasan, A. P., & Nikolic, B. (20XX). Digital integrated circuits. Englewood Cliffs: Prentice hall.
  • Uyemura, J. P. (20XX). CMOS logic circuit design. Springer.
  • Kang, S. M., & Leblebici, Y. (20XX). Cmos Digital Integrated Circuits. McGraw-Hill Education.
Policies
  • Homeworks are due at the beginning of class. Late homeworks will be downgraded by 20% for each day passed the due date.
  • Exams are in closed-notes and closed-books format.
  • To be eligible of taking the final exam, your average excluding the final exam should be at least 50% of the class average.

Weekly Course Plan

Date
Topic
Week 1, 4/3/2021 Introduction
Week 2, 11/3/2021 Switching theory & devices for digital circuits and inverters
Weeks 3, 18/3/2021 NMOS/CMOS inverters & their static and dynamic behaviors
Weeks 4, 25/3/2021 Optimization of multiple-stage inverters and buffers
Week 5, 1/4/2021 Static and complex logic gates and their area-delay-power performance analysis
Weeks 6, 8/4/2021 Recitation and QUIZ
Week 7, 15/4/2021 Pass transistor logic with Shannon's expansion and performance analysis
Week 8, 22/4/2021 Dynamic logic gates, synchronization
Weeks 9, 29/4/2021 Dynamic logic gates performance analysis
Week 10, 6/5/2021 Recitation and QUIZ
Week 10, 13/5/2021 HOLIDAY, no class
Weeks 12, 20/5/2021 Static and dynamic memory elements: D, SR, and JK flip-flops
Weeks 13, 27/5/2021 Synchronization and timing analysis of digital circuits having logic and memory elements
Week 14, 3/6/2021 Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories
Weeks 15, 10/6/2021 Recitation and QUIZ

Course Materials

Quizzes & Solutions Homeworks & Solutions Course Materials
Quiz 1 & Solutions Homework 1 & Solutions Lecture Notes
Quiz 2 & Solutions Homework 2 & Solutions
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