EHB 322E: Digital Electronic Circuits
From The Emerging Circuits and Computation Group at ITU
Revision as of 17:34, 25 May 2020 by Altun
- May 10th The fourth homework has been posted that is due 22/05/2020 (before 16:30).
- Apr. 26th The third homework has been posted that is due 04/05/2020 (before 16:30).
- Apr. 11th The second homework has been posted that is due 20/04/2020 (before 16:30).
- Apr. 5th Due to size limitations in Ninova, we have decided to post all lecture videos under Google Drive. Check google account details in Ninova.
- Apr. 4th Considering that we have 80+ students, using Zoom for lectures does not seem to feasible; instead we post videos for lectures in Ninova. However, we plan to use Zoom in Ninova for question-answer sessions with up to 20 students. We will make related announcements.
- Apr. 4th Syllabus and weekly course plan have been updated, please check.
- Apr. 4th Lecture notes of all weeks have been posted.
- Mar. 31th Due to Coronavirus, we are transforming to online education. For this purpose we use Ninova with some videos. For the the rest of the class, we only have homeworks and the final exam; no midterm, no quiz. Check announcements here and in Ninova.
- Feb. 24th The first homework has been posted that is due 12/03/2019 (before the lecture).
- Feb. 10th Instead of 8:30, we start lectures at 9:00 for convenience of the students' attendance.
- Feb. 10th As a simulation tool, Spice is required for homeworks. Among different Spice-based programs, LTspice is a good and free choice; you can download it by clicking here.
EHB 322E: Digital Electronic Circuits, CRN: 25160, Thursdays 8:30-11:30, Room: 2102 (EEF), Spring 2020.
Weekly Course Plan
|Week 1, 13/2/2020||Introduction|
|Week 2, 20/2/2020||Switching theory & devices for digital circuits and inverters|
|Weeks 3, 27/2/2020||NMOS/CMOS inverters & their static and dynamic behaviors|
|Weeks 4, 5/3/2020||Optimization of multiple-stage inverters and buffers|
|Week 5, 12/3/2020||Static and complex logic gates and their area-delay-power performance analysis|
|Weeks 6, 19/3/2020||HOLIDAY, no class|
|Week 7, 26/3/2020||HOLIDAY, no class|
|Week 8, 2/4/2020||HOLIDAY, no class|
|Weeks 9, 9/4/2020||Recitation with the teaching assistant (Video posted in Ninova)|
|Week 10, 16/4/2020||Pass transistor logic with Shannon's expansion and performance analysis (Video posted in Ninova)|
|Week 10, 23/4/2020||Dynamic logic gates, synchronization, and performance analysis (Video posted in Ninova)|
|Weeks 12, 30/4/2020||Static and dynamic memory elements: D, SR, and JK flip-flops (Video posted in Ninova)|
|Weeks 13, 7/5/2020||Synchronization and timing analysis of digital circuits having logic and memory elements (Video posted in Ninova)|
|Week 14, 14/5/2020||Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories (Video posted in Ninova)|
|Weeks 15, 21/5/2020||Recitation with the teaching assistant (Video posted in Ninova)|
|Homeworks and Quizzes & Solutions||Course Materials||Exams|
|Homework 1 & Solutions||Lecture Notes|
|Quiz 1 & Solutions||Recitation 1|
|Homework 2 & Solutions|
|Homework 3 & Solutions|
|Homework 4 & Solutions|