EHB 322E-M

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|  Week  1, 10/2/2020     || Introduction  
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|  Week  1, 1/3/2021     || Introduction  
 
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|  Week  2, 17/2/2020       || Switching theory & devices for digital circuits and inverters
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|  Week  2, 8/3/2021       || Switching theory & devices for digital circuits and inverters
 
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|  Weeks 3, 24/2/2020 || NMOS/CMOS inverters & their static and dynamic behaviors
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|  Weeks 3, 15/3/2021 || NMOS/CMOS inverters & their static and dynamic behaviors
 
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|  Weeks 4, 2/3/2020   || Optimization of multiple-stage inverters and buffers  
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|  Weeks 4, 22/3/2021   || Optimization of multiple-stage inverters and buffers  
 
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|  Week 5, 9/3/2020     || Static and complex logic gates and their area-delay-power performance analysis
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|  Week 5, 29/3/2021     || Static and complex logic gates and their area-delay-power performance analysis
 
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|  Weeks 6, 16/3/2020   || HOLIDAY, no class
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|  Weeks 6, 5/4/2021   || Recitation and QUIZ
 
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|  Week  7, 23/3/2020     ||   HOLIDAY, no class
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|  Week  7, 12/4/2021     || Pass transistor logic with Shannon's expansion and performance analysis
 
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|  Week  8, 30/3/2020   || HOLIDAY, no class  
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|  Week  8, 19/4/2021   ||  Dynamic logic gates, synchronization
 
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|  Weeks 9, 6/4/2020 ||  Recitation with the teaching assistant (Video posted in Ninova)
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|  Weeks 9, 26/4/2021 ||  Dynamic logic gates performance analysis
 
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|  Week  10, 13/4/2020     || Pass transistor logic with Shannon's expansion and performance analysis (Video posted in Ninova)
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|  Week  10, 3/5/2021     || Recitation and QUIZ
 
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|-  
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|  Week  10, 20/4/2020     || Dynamic logic gates, synchronization, and performance analysis (Video posted in Ninova)
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|  Week  10, 10/5/2021     || HOLIDAY, no class 
 
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|-  
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|  Weeks 12, 27/4/2020 || Static and dynamic memory elements: D, SR, and JK flip-flops  (Video posted in Ninova)
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|  Weeks 12, 17/5/2021 || Static and dynamic memory elements: D, SR, and JK flip-flops   
 
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|-  
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|  Weeks 13, 4/5/2020 || Synchronization and timing analysis of digital circuits having logic and memory elements (Video posted in Ninova)
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|  Weeks 13, 24/5/2021 || Synchronization and timing analysis of digital circuits having logic and memory elements  
 
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|  Week  14, 11/5/2020       || Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories (Video posted in Ninova)
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|  Week  14, 31/5/2021       || Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories  
 
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|  Weeks 15, 18/5/2020 || Recitation with the teaching assistant (Video posted in Ninova)
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|  Weeks 15, 7/6/2021 || Recitation and QUIZ
 
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Revision as of 11:34, 7 March 2021

Contents

Announcements

  • Mar. 7th Lectures are given online using Zoom that can be accessed via Ninova.
  • Mar. 7th As a simulation tool, Spice is required for homeworks. Among different Spice-based programs, LTspice is a good and free choice; you can download it by clicking here.

Syllabus

EHB 322E: Digital Electronic Circuits, CRN: 25205, Mondays 12:30-15:30, Online using Zoom via Ninova, Spring 2021.
Instructor

Mustafa Altun

  • Email: altunmus@itu.edu.tr
  • Tel: 02122856635
  • Office hours: 15:00 – 16:30 online via email or online talk
Teaching Assistant

Sadık İlik

  • Email: iliks@itu.edu.tr
  • Room: 3105 EEF
Grading
  • Quizzes: 60%
    • 3 quizzes (15% each) during the lecture time that will on 13/11/2020, 4/12/2020, 25/12/2020, and 22/1/2021.
  • Homeworks: 10%
    • 2 homeworks (5% each)
  • Final Exam: 30%
Reference Books
  • Weste, N., & Harris, D. (20XX). Integrated Circuit Design: International Version: A Circuits and Systems Perspective. Pearson Education,.
  • Rabaey, J. M., Chandrakasan, A. P., & Nikolic, B. (20XX). Digital integrated circuits. Englewood Cliffs: Prentice hall.
  • Uyemura, J. P. (20XX). CMOS logic circuit design. Springer.
  • Kang, S. M., & Leblebici, Y. (20XX). Cmos Digital Integrated Circuits. McGraw-Hill Education.
Policies
  • Homeworks are due at the beginning of class. Late homeworks will be downgraded by 20% for each day passed the due date.
  • Exams are in closed-notes and closed-books format.
  • To be eligible of taking the final exam, your average excluding the final exam should be at least 50% of the class average.

Weekly Course Plan

Date
Topic
Week 1, 1/3/2021 Introduction
Week 2, 8/3/2021 Switching theory & devices for digital circuits and inverters
Weeks 3, 15/3/2021 NMOS/CMOS inverters & their static and dynamic behaviors
Weeks 4, 22/3/2021 Optimization of multiple-stage inverters and buffers
Week 5, 29/3/2021 Static and complex logic gates and their area-delay-power performance analysis
Weeks 6, 5/4/2021 Recitation and QUIZ
Week 7, 12/4/2021 Pass transistor logic with Shannon's expansion and performance analysis
Week 8, 19/4/2021 Dynamic logic gates, synchronization
Weeks 9, 26/4/2021 Dynamic logic gates performance analysis
Week 10, 3/5/2021 Recitation and QUIZ
Week 10, 10/5/2021 HOLIDAY, no class
Weeks 12, 17/5/2021 Static and dynamic memory elements: D, SR, and JK flip-flops
Weeks 13, 24/5/2021 Synchronization and timing analysis of digital circuits having logic and memory elements
Week 14, 31/5/2021 Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories
Weeks 15, 7/6/2021 Recitation and QUIZ

Course Materials

Quizzes & Solutions Homeworks & Solutions Course Materials
Retrieved from "https://www.ecc.itu.edu.tr/index.php?title=EHB_322E-M&oldid=4084"
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