EHB 205E

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{{DISPLAYTITLE: EHB 205E: Introduction to Logic Design}}
 
{{DISPLAYTITLE: EHB 205E: Introduction to Logic Design}}
 
== Announcements ==
 
== Announcements ==
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* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Oct. 14th</span> [[Media:ehb205e-2021-fall-hw-01.pdf | '''The first homework''']] has been posted that is due '''29/10/2021''' before 9:30.
  
 
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Oct. 7th</span>  The class starts at '''9:30''' instead of 8:30.
 
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Oct. 7th</span>  The class starts at '''9:30''' instead of 8:30.

Revision as of 18:24, 14 October 2021

Contents

Announcements

  • Oct. 7th The class starts at 9:30 instead of 8:30.
  • Oct. 7th The class is performed physically (not virtually).
  • Oct. 7th The class is given in the room 4104 (first floor), EEF.

Syllabus

EHB 205E: Introduction to Logic Design, CRN: 11198, Fridays 8:30-11:30, Room: 4104 (EEF), Fall 2021.
Instructor

Mustafa Altun

  • Email: altunmus@itu.edu.tr
  • Tel: 02122856635
  • Office hours: 15:00 – 16:00 on Wednesdays in Room:3005, EEF (or stop by my office any time)
Teaching Assistant

Emre Altuner

  • Email: altuner16@itu.edu.tr
  • Room: 3107 EEF
Grading
  • Quizzes: 10%
    • 2 pop-up quizzes (5% each) - no prior announcement of quiz dates and times
  • Homeworks: 10%
    • 4 homeworks (2.5% each)
  • Midterm Exams: 40%
    • 2 midterms (20% each) during the lecture time that will on 19/11/2021 and 24/12/2021.
  • Final Exam: 40%
Textbook
  • Wakerly, J. F. (20XX). Digital Design Principles & Practices. Prentice Hall.
Reference Books
  • Roth Jr, C., & Kinney, L. (20XX). Fundamentals of logic design. Cengage Learning.
  • Mano, M. M., & Kime, C. R. (20XX). Logic and Computer Design Fundamentals. Prentice Hall.
Policies
  • Homeworks are due at the beginning of class. Late homeworks will be downgraded by 20% for each day passed the due date.
  • Exams are in closed-notes and closed-books format.
  • To be eligible of taking the final or the resit exam, you should take both midterms and your midterm average should be at least 25 (out of 100).

Weekly Course Plan

Date
Topic
Week 1, 8/10/2021 Introduction
Week 2, 15/10/2021 Digital logic fundamentals: gates, combinational circuits, Boolean expressions
Week 3, 22/10/2021 Digital logic fundamentals: truth tables, two-level forms (AND/OR/NAND/NOR), "don't cares"
Weeks 4, 29/10/2021 HOLIDAY!
Weeks 5, 5/11/2021 Logic minimization: Karnaugh maps, Quine-McCluskey method
Week 6, 12/11/2021 Combinational circuit design: building blocks (adders, multiplexers, decoders, etc.)
Weeks 7, 19/11/2021 MIDTERM I
Week 8, 26/11/2021 HOLIDAY, no class
Week 9, 3/12/2021 Combinational circuit design: implementing Boolean and arithmetic operations
Weeks 10, 10/12/2021 Area-Delay Performance analysis of combinational circuits
Week 11, 17/12/2021 Sequential circuits: latches & flip-flops
Week 12, 24/12/2021 MIDTERM II
Weeks 13, 31/12/2021 Sequential circuit design: state graphs and tables, modules
Weeks 14, 7/1/2022 Sequential circuit design: modules, state machines
Weeks 15, 14/1/2022 Sequential circuit design: modules, state machines

Course Materials

Homeworks & Solutions Homeworks & Solutions Quizzes & Solutions Sample Problems & Solutions Exams
Homework 1
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