EEF 205E: Introduction to Logic Design
From The Emerging Circuits and Computation Group at ITU
Syllabus
EEF 205E: Introduction to Logic Design, CRN: 14414, Fridays 8:30-11:30, Room: 6309 (EEF), Fall 2026.
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Instructor
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| Teaching Assistant
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Fatma Betül Fişne
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| Grading
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| Textbook
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| Reference Books
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| Policies
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Weekly Course Plan
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Date
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Topic
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| Week 1, 2/10/2026 | Introduction |
| Week 2, 9/10/2026 | Digital logic fundamentals: gates, combinational circuits, Boolean expressions |
| Week 3, 16/10/2026 | Digital logic fundamentals: truth tables, two-level forms (AND/OR/NAND/NOR), "don't cares" |
| Weeks 4, 23/10/2026 | Logic minimization: Karnaugh maps, Quine-McCluskey method |
| Weeks 5, 30/10/2026 | Logic minimization: Karnaugh maps, Quine-McCluskey method |
| Week 6, 6/11/2026 | Combinational circuit design: building blocks (adders, multiplexers, decoders, etc.) |
| Weeks 7, 13/11/2026 | MIDTERM I |
| Week 8, 20/11/2026 | HOLIDAY! |
| Week 9, 27/11/2026 | Combinational circuit design: implementing Boolean and arithmetic operations |
| Weeks 10, 4/12/2026 | Sequential circuits: latches & flip-flops |
| Week 11, 11/12/2026 | Sequential circuit design: state graphs and tables, modules |
| Week 12, 18/12/2026 | MIDTERM II |
| Weeks 13, 25/12/2026 | Sequential circuit design: modules, state machines |
Course Materials
Shared through Ninova.