EHB 322E-T
From The Emerging Circuits and Computation Group at ITU
(Difference between revisions)
(→Announcements) |
(→Syllabus) |
||
| Line 53: | Line 53: | ||
| <div style="font-size: 120%;"> '''Reference Books'''</div> | | <div style="font-size: 120%;"> '''Reference Books'''</div> | ||
|| | || | ||
| + | * Weste, N., & Harris, D. (20XX). Integrated Circuit Design: International Version: A Circuits and Systems Perspective. Pearson Education,. | ||
* Rabaey, J. M., Chandrakasan, A. P., & Nikolic, B. (20XX). Digital integrated circuits. Englewood Cliffs: Prentice hall. | * Rabaey, J. M., Chandrakasan, A. P., & Nikolic, B. (20XX). Digital integrated circuits. Englewood Cliffs: Prentice hall. | ||
* Uyemura, J. P. (20XX). CMOS logic circuit design. Springer. | * Uyemura, J. P. (20XX). CMOS logic circuit design. Springer. | ||
Revision as of 17:15, 22 May 2019
Contents |
Announcements
- May 22nd To see your grades click here.
- May 6th The third homework has been posted that is due 16/05/2019 (before the lecture).
- Apr. 29th The second midterm will be held on Thursday May 2nd, between 9:30-11:30 in classroom 5302 in EEF.
- Apr. 11th The second homework has been posted that is due 25/04/2019 (before the lecture).
- Mar. 18th The first midterm will be held on Thursday Mar. 21st, between 9:30-11:30 in classroom 5302 in EEF.
- Feb. 18th The first homework has been posted that is due 07/03/2019 (before the lecture).
- Feb. 1st As a simulation tool, Spice is required for homeworks. Among different Spice-based programs, LTspice is a good and free choice; you can download it by clicking here.
Syllabus
EHB 322E: Digital Electronic Circuits, CRN: 20972, Thursdays 9:30-12:30, Room: 5302 (EEF), Spring 2019.
|
Instructor
|
|
| Teaching Assistant
|
Sadık İlik
|
| Grading
|
|
| Reference Books
|
|
| Policies
|
|
Weekly Course Plan
|
Date
|
Topic
|
| Week 1, 7/2/2019 | No class |
| Week 2, 14/2/2019 | Introduction |
| Week 3, 21/2/2019 | Switching theory & devices for digital circuits and inverters |
| Weeks 4, 28/2/2019 | NMOS/CMOS inverters & their static and dynamic behaviors |
| Weeks 5, 7/3/2019 | Optimization of multiple-stage inverters and buffers |
| Week 6, 14/3/2019 | Static logic gates and area-delay-power performance analysis |
| Weeks 7, 21/3/2019 | MIDTERM I |
| Week 8, 28/3/2019 | HOLIDAY, no class |
| Week 9, 4/4/2019 | Complex logic gates and their delays |
| Weeks 10, 11/4/2019 | Pass transistor logic with Shannon's expansion and performance analysis |
| Week 11, 18/4/2019 | Dynamic logic gates, synchronization, and performance analysis |
| Week 12, 25/4/2019 | Static and dynamic memory elements: D, SR, and JK flip-flops |
| Weeks 13, 2/5/2019 | MIDTERM II |
| Weeks 14, 9/5/2019 | Synchronization and timing analysis of digital circuits having logic and memory elements |
| Weeks 15, 16/5/2019 | Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories |
Course Materials
| Homeworks & Solutions | Quizzes & Solutions | Exams |
|---|---|---|
| Homework 1 & Solutions | Quiz 1 & Solutions | Midterm 1 |
| Homework 2 & Solutions | Quiz 2 & Solutions | Midterm 2 |
| Homework 3 & Solutions |