BLG 231E

From The Emerging Circuits and Computation Group at ITU
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== Announcements ==
 
== Announcements ==
  
−
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Dec. 30th</span> To see your final grades [[Media:blg231e-2014-fall-final-grades.pdf | '''click here''']].
+
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Jan. 12th</span> To see your final grades [[Media:blg231e-2017-fall-final-grades.pdf | '''click here''']].
−
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Dec. 16th</span> We will have a '''make-up lecture''' on 16/12/2014 between 13:30-15:00 in the room 2104, EEF. For the content of this lecture [[Media:blg231e-2014-fall-sequential-circuit-design-problems.pdf | '''click here''']].
+
 
−
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Nov. 24th</span> Midterm-2 will be held in rooms '''2104''' and '''5305''' between '''15:30 - 17:30'''.
+
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Dec. 15th</span> [[Media:blg231e-2017-fall-hw-03.pdf | '''The third homework''']] has been posted that is due '''29/12/2017''' before 12:30.
−
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Nov. 18th</span> [[Media:blg231e-2014-fall-hw-03.pdf | '''The third homework''']] has been posted that is due '''2/12/2014''' before 13:30.
+
 
−
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Oct. 20th</span> Midterm-1 will be held in rooms '''2104''' and '''5305''' between '''15:30 - 17:30'''.
+
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Nov. 16th</span> [[Media:blg231e-2017-fall-hw-02.pdf | '''The second homework''']] has been posted that is due '''24/11/2017''' before 9:30.
−
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Oct. 14th</span> [[Media:blg231e-2014-fall-hw-02.pdf | '''The second homework''']] has been posted that is due '''4/11/2014''' before 13:30.
+
 
−
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Sept. 24th</span> [[Media:blg231e-2014-fall-hw-01.pdf | '''The first homework''']] has been posted that is due '''8/10/2014''' before 16:30.
+
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Nov. 8th</span> No class on November 10th due to [http://www.sis.itu.edu.tr/tr/duyuru/duyuru_detay.php?id=1068 the university's decision].
−
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Sept. 7th</span>  The class is given in the room '''2104''' (first floor), EEF.
+
 
 +
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Oct. 10th</span> The classroom is changed to '''4102''' (first floor), EEF.
 +
 
 +
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Sept. 22nd</span> [[Media:blg231e-2017-fall-hw-01.pdf | '''The first homework''']] has been posted that is due '''6/10/2017''' before 9:30.
 +
 
 +
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Sept. 8th</span>  The class is given in the room '''5305''' (third floor), EEF.
  
 
== Syllabus ==
 
== Syllabus ==
−
<div style="font-size: 120%;"> '''BLG 231E: Digital Circuits''', CRN: 11043, Tuesdays 13:30-16:30, Room: 2104 (EEF), Fall 2014. </div>  
+
<div style="font-size: 120%;"> '''BLG 231E: Digital Circuits''', CRN: 13783, Fridays 09:30-12:30, Room: 4102 (EEF), Fall 2017. </div>  
 
{| border="1" cellspacing="0" cellpadding="5" " width="80%"
 
{| border="1" cellspacing="0" cellpadding="5" " width="80%"
 
    
 
    
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* Email: altunmus@itu.edu.tr
 
* Email: altunmus@itu.edu.tr
 
* Tel: 02122856635
 
* Tel: 02122856635
−
* Office hours: 15:00 – 16:30 on Thursdays in Room:3005, EEF (or stop by my office any time)
+
* Office hours: 15:00 – 16:00 on Tuesdays in Room:3005, EEF (or stop by my office any time)
 
|-  
 
|-  
 
| <div style="font-size: 120%;"> '''Teaching Assistant'''</div>
 
| <div style="font-size: 120%;"> '''Teaching Assistant'''</div>
 
         ||  
 
         ||  
−
Salih Vehbi Cömert
+
Ensar Vahapoğlu
−
* Email: vehbicomert@gmail.com
+
* Email: ensarvahapoglu@gmail.com
−
* Room: 3009 EEF  
+
* Room: 3007 EEF  
 
|-  
 
|-  
 
|  <div style="font-size: 120%;"> '''Grading'''</div>
 
|  <div style="font-size: 120%;"> '''Grading'''</div>
 
         ||  
 
         ||  
  
−
* Homeworks: '''15%'''
+
* Quizzes: '''10%'''
−
** 3 homeworks (5% each)
+
** 2 pop-up quizzes (5% each) - '''no''' prior announcement of quiz dates and times
  
−
* Midterm Exams: '''45%'''
+
* Homeworks: '''10%'''
−
** 2 midterms (22.5% each) during the lecture time that will on 21/10/2014 and 25/11/2014.
+
** 3 homeworks (3.3% each)
 +
 
 +
* Midterm Exams: '''40%'''
 +
** 2 midterms (20% each) during the lecture time that will on '''27/10/2017''' and '''1/12/2017'''.
  
 
* Final Exam: '''40%'''
 
* Final Exam: '''40%'''
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|  <div style="font-size: 120%;"> '''Textbook'''</div>
 
|  <div style="font-size: 120%;"> '''Textbook'''</div>
 
         ||  
 
         ||  
−
* Wakerly, J. F. (2005). Digital Design Principles & Practices, 4th edition. Prentice Hall.
+
* Wakerly, J. F. (20XX). Digital Design Principles & Practices. Prentice Hall.
  
 
|-
 
|-
 
|  <div style="font-size: 120%;"> '''Reference Books'''</div>
 
|  <div style="font-size: 120%;"> '''Reference Books'''</div>
 
         ||  
 
         ||  
−
* Roth Jr, C., & Kinney, L. (2013). Fundamentals of logic design. Cengage Learning.
+
* Roth Jr, C., & Kinney, L. (20XX). Fundamentals of logic design. Cengage Learning.
  
−
* Mano, M. M., & Kime, C. R. (2008). Logic and Computer Design Fundamentals, 4/E edition, Prentice Hall.
+
* Mano, M. M., & Kime, C. R. (20XX). Logic and Computer Design Fundamentals. Prentice Hall.
  
 
|-
 
|-
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|| <div style="font-size: 120%;"> '''Topic'''</div>
 
|| <div style="font-size: 120%;"> '''Topic'''</div>
 
|-  
 
|-  
−
|  Week  1, 9/9/2014       || Introduction  
+
|  Week  1, 15/9/2017       || Introduction  
 
|-  
 
|-  
−
|  Week  2, 16/9/2014       || Digital logic fundamentals: gates, combinational circuits, Boolean expressions
+
|  Week  2, 22/9/2017       || Digital logic fundamentals: gates, combinational circuits, Boolean expressions  
 
|-  
 
|-  
−
|  Week  3, 23/9/2014       || Digital logic fundamentals: truth tables, two-level forms (AND/OR/NAND/NOR), "don't cares"
+
|  Week  3, 29/9/2017       || Digital logic fundamentals: truth tables, two-level forms (AND/OR/NAND/NOR), "don't cares"  
 
|-  
 
|-  
−
|  Weeks 4, 30/9/2014 || Logic minimization: Karnaugh maps, Quine-McCluskey method
+
|  Weeks 4, 6/10/2017 || Logic minimization: Karnaugh maps, Quine-McCluskey method
 
|-
 
|-
−
|  Weeks 5, 7/10/2014   || HOLIDAY!, no class
+
|  Weeks 5, 13/10/2017   || Quine-McCluskey method, binary decision diagrams, hazards
 
|-
 
|-
−
|  Week 6, 14/10/2014      || Quine-McCluskey method, binary decision diagrams, hazards
+
|  Week 6, 20/10/2017      || Combinational circuit design: building blocks (adders, multiplexers, decoders, etc.)
 
|-  
 
|-  
−
|  Weeks 7, 21/10/2014 || MIDTERM I  
+
|  Weeks 7, 27/10/2017 || MIDTERM I  
 
|-
 
|-
−
|  Week  8, 28/10/2014      || HOLIDAY!, no class  
+
|  Week  8, 3/11/2017    || HOLIDAY, no class  
 
|-  
 
|-  
−
|  Week  9, 4/11/2014     || Combinational circuit design: building blocks (adders, multiplexers, decoders, etc.)
+
|  Week  9, 10/11/2017     || Combinational circuit design: implementing Boolean and arithmetic operations
 
|-  
 
|-  
−
|  Weeks 10, 11/11/2014 || Combinational circuit design: arithmetic operations
+
|  Weeks 10, 17/11/2017 || Area-Delay Performance analysis of combinational circuits
 
|-  
 
|-  
−
|  Week  11, 18/11/2014     || Sequential circuits: latches & flip-flops
+
|  Week  11, 24/11/2017     || Sequential circuits: latches & flip-flops
 
|-  
 
|-  
−
|  Week  12, 25/11/2014    || MIDTERM II
+
|  Week  12, 1/12/2017    || MIDTERM II
 
|-  
 
|-  
−
|  Weeks 13, 2/12/2014 || Sequential circuit design: state graphs and tables, modules
+
|  Weeks 13, 8/12/2017 || Sequential circuit design: state graphs and tables, modules
 
|-  
 
|-  
−
|  Weeks 14, 9/12/2014 || Sequential circuit design: modules, state machines
+
|  Weeks 14, 15/12/2017 || Sequential circuit design: modules, state machines
 +
|-
 +
|  Weeks 15, 22/12/2017 || Sequential circuit design: modules, state machines
 
|}
 
|}
  
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{| border="1" cellspacing="0" cellpadding="5"
 
{| border="1" cellspacing="0" cellpadding="5"
−
! Homeworks  & Solutions!! Exams  
+
! Homeworks  & Solutions!! Quizzes & Solutions!! Sample Problems & Solutions !!Exams  
 
|-  
 
|-  
−
| [[Media:blg231e-2014-fall-hw-01.pdf | Homework 1]] & [[Media:blg231e-2014-fall-hw-01-solutions.pdf | Solutions]]  ||  [[Media:blg231e-2014-fall-midterm-01.pdf | Midterm 1]]
+
| [[Media:blg231e-2017-fall-hw-01.pdf | Homework 1]] & [[Media:blg231e-2017-fall-hw-01-solutions.pdf | Solutions]]  ||  [[Media:blg231e-2017-fall-quiz-01.pdf | Quiz 1]] & [[Media:blg231e-2017-fall-quiz-01-solutions.pdf | Solutions]]  || [[Media:blg231e-2017-fall-problems-01.pdf | Problem Set 1]] & [[Media:blg231e-2017-fall-problems-01-solutions.pdf | Solutions]] || [[Media:blg231e-2017-fall-midterm-01.pdf | Midterm 1]]
 
|-  
 
|-  
−
| [[Media:blg231e-2014-fall-hw-02.pdf | Homework 2]] & [[Media:blg231e-2014-fall-hw-02-solutions.pdf | Solutions]] ||  [[Media:blg231e-2014-fall-midterm-02.pdf | Midterm 2]]
+
| [[Media:blg231e-2017-fall-hw-02.pdf | Homework 2]] & [[Media:blg231e-2017-fall-hw-02-solutions.pdf | Solutions]]|| [[Media:blg231e-2017-fall-quiz-02.pdf | Quiz 2]] & [[Media:blg231e-2017-fall-quiz-02-solutions.pdf | Solutions]]  || [[Media:blg231e-2017-fall-problems-02.pdf | Problem Set 2]] & [[Media:blg231e-2017-fall-problems-02-solutions.pdf | Solutions]] || [[Media:blg231e-2017-fall-midterm-02.pdf | Midterm 2]]
 
|-
 
|-
−
| [[Media:blg231e-2014-fall-hw-03.pdf | Homework 3]] & [[Media:blg231e-2014-fall-hw-03-solutions.pdf | Solutions]] ||      
+
| [[Media:blg231e-2017-fall-hw-03.pdf | Homework 3]] & [[Media:blg231e-2017-fall-hw-03-solutions.pdf | Solutions]] || ||  ||
 +
 
 
|}
 
|}

Latest revision as of 00:23, 12 January 2018

Contents

[edit] Announcements

  • Oct. 10th The classroom is changed to 4102 (first floor), EEF.
  • Sept. 8th The class is given in the room 5305 (third floor), EEF.

[edit] Syllabus

BLG 231E: Digital Circuits, CRN: 13783, Fridays 09:30-12:30, Room: 4102 (EEF), Fall 2017.
Instructor

Mustafa Altun

  • Email: altunmus@itu.edu.tr
  • Tel: 02122856635
  • Office hours: 15:00 – 16:00 on Tuesdays in Room:3005, EEF (or stop by my office any time)
Teaching Assistant

Ensar Vahapoğlu

  • Email: ensarvahapoglu@gmail.com
  • Room: 3007 EEF
Grading
  • Quizzes: 10%
    • 2 pop-up quizzes (5% each) - no prior announcement of quiz dates and times
  • Homeworks: 10%
    • 3 homeworks (3.3% each)
  • Midterm Exams: 40%
    • 2 midterms (20% each) during the lecture time that will on 27/10/2017 and 1/12/2017.
  • Final Exam: 40%
Textbook
  • Wakerly, J. F. (20XX). Digital Design Principles & Practices. Prentice Hall.
Reference Books
  • Roth Jr, C., & Kinney, L. (20XX). Fundamentals of logic design. Cengage Learning.
  • Mano, M. M., & Kime, C. R. (20XX). Logic and Computer Design Fundamentals. Prentice Hall.
Policies
  • Homeworks are due at the beginning of class. Late homeworks will be downgraded by 20% for each day passed the due date.
  • Exams are in closed-notes and closed-books format.
  • To be eligible of taking the final or the resit exam, you should take both midterms and your midterm average should be at least 25 (out of 100).

[edit] Weekly Course Plan

Date
Topic
Week 1, 15/9/2017 Introduction
Week 2, 22/9/2017 Digital logic fundamentals: gates, combinational circuits, Boolean expressions
Week 3, 29/9/2017 Digital logic fundamentals: truth tables, two-level forms (AND/OR/NAND/NOR), "don't cares"
Weeks 4, 6/10/2017 Logic minimization: Karnaugh maps, Quine-McCluskey method
Weeks 5, 13/10/2017 Quine-McCluskey method, binary decision diagrams, hazards
Week 6, 20/10/2017 Combinational circuit design: building blocks (adders, multiplexers, decoders, etc.)
Weeks 7, 27/10/2017 MIDTERM I
Week 8, 3/11/2017 HOLIDAY, no class
Week 9, 10/11/2017 Combinational circuit design: implementing Boolean and arithmetic operations
Weeks 10, 17/11/2017 Area-Delay Performance analysis of combinational circuits
Week 11, 24/11/2017 Sequential circuits: latches & flip-flops
Week 12, 1/12/2017 MIDTERM II
Weeks 13, 8/12/2017 Sequential circuit design: state graphs and tables, modules
Weeks 14, 15/12/2017 Sequential circuit design: modules, state machines
Weeks 15, 22/12/2017 Sequential circuit design: modules, state machines

[edit] Course Materials

Homeworks & Solutions Quizzes & Solutions Sample Problems & Solutions Exams
Homework 1 & Solutions Quiz 1 & Solutions Problem Set 1 & Solutions Midterm 1
Homework 2 & Solutions Quiz 2 & Solutions Problem Set 2 & Solutions Midterm 2
Homework 3 & Solutions
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