Publications and Presentations
From The Emerging Circuits and Computation Group at ITU
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− | [[File:PPT.jpg|60px|link=]] | + | [[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/7/71/Safaltin_EtAl_Technology_Development_for_Switching_Lattices.pptx]] |
</span> | </span> | ||
− | <br> | + | <br> [http://www.ecc.itu.edu.tr/images/7/71/Safaltin_EtAl_Technology_Development_for_Switching_Lattices.pptx Slides] |
− | Slides | + | |
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| Furkan Peker and [[Mustafa Altun]] | | Furkan Peker and [[Mustafa Altun]] | ||
|- valign="top" | |- valign="top" | ||
− | | ''' | + | | '''appeared in''': |
− | | width="624" | [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6687315 IEEE Transactions on Multi-Scale Computing Systems], | + | | width="624" | [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6687315 IEEE Transactions on Multi-Scale Computing Systems], Vol. 4, No. 4, pp. 522–532, 2018. |
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− | [[File:PPT.jpg|60px|link=]] | + | [[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/5/54/Aksoy_Altun_SAT_based_Synthesis_of_Switching_Lattices.pptx]] |
</span> | </span> | ||
− | <br> | + | <br> [http://www.ecc.itu.edu.tr/images/5/54/Aksoy_Altun_SAT_based_Synthesis_of_Switching_Lattices.pptx Slides] |
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− | == Reversible | + | == Reversible Computing == |
+ | |||
+ | === CMOS Fault Tolerance === | ||
+ | |||
+ | {| style="border:2px solid #abd5f5; background:#f1f5fc;" | ||
+ | |||
+ | | | ||
+ | {| | ||
+ | |- valign=top | ||
+ | | width="100" |'''title''': | ||
+ | | width="550"|[[Media:Parvin_Altun_CMOS_Fault_Tolerance_with_Preservative_Reversible_Gates.pdf | Implementation of CMOS Logic Circuits with Perfect Fault Detection Using Preservative Reversible Gates]] | ||
+ | |- valign="top" | ||
+ | | '''authors''': | ||
+ | | Sajjad Parvin and [[Mustafa Altun]] | ||
+ | |- valign=top | ||
+ | | '''presented at''': | ||
+ | | width="550"| [http://tima.univ-grenoble-alpes.fr/conferences/iolts/iolts19/ IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS)], Rhodes Island, Greece, 2019. | ||
+ | |} | ||
+ | |||
+ | | align=center width="70" | | ||
+ | <span class="plainlinks"> | ||
+ | [[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/e/ee/Parvin_Altun_CMOS_Fault_Tolerance_with_Preservative_Reversible_Gates.pdf]]</span> | ||
+ | <br> | ||
+ | [[Media:Parvin_Altun_CMOS_Fault_Tolerance_with_Preservative_Reversible_Gates.pdf | Paper]] | ||
+ | | align="center" width="70" | | ||
+ | <span class="plainlinks"> | ||
+ | |||
+ | [[File:PPT.jpg|60px|link=]] | ||
+ | </span> | ||
+ | <br> Poster | ||
+ | |} | ||
{| style="border:2px solid #abd5f5; background:#f1f5fc; " | {| style="border:2px solid #abd5f5; background:#f1f5fc; " | ||
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| [[Mustafa Altun]], Sajjad Parvin, and Husrev Cilasun | | [[Mustafa Altun]], Sajjad Parvin, and Husrev Cilasun | ||
|- valign="top" | |- valign="top" | ||
− | | ''' | + | | '''appeared in''': |
− | | [http://ieeeaccess.ieee.org/ IEEE Access], 2018. | + | | [http://ieeeaccess.ieee.org/ IEEE Access], Vol. 6, pp. 74475–74484, 2018. |
|} | |} | ||
| align=center width="70" | | | align=center width="70" | | ||
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+ | |||
+ | === Logic Synthesis === | ||
{| style="border:2px solid #abd5f5; background:#f1f5fc; " | {| style="border:2px solid #abd5f5; background:#f1f5fc; " | ||
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| Tuba Ayhan and [[Mustafa Altun]] | | Tuba Ayhan and [[Mustafa Altun]] | ||
|- valign="top" | |- valign="top" | ||
− | | ''' | + | | '''appeared in''': |
− | | [http://ieeeaccess.ieee.org/ IEEE Access], | + | | [http://ieeeaccess.ieee.org/ IEEE Access], Vol. 7, pp. 4726–4734, 2019. |
|} | |} | ||
| align=center width="70" | | | align=center width="70" | | ||
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| '''presented at''': | | '''presented at''': | ||
− | | width="550"| [http:// | + | | width="550"| [http://ieeexplore.ieee.org/xpl/conhome.jsp?punumber=1001786 Sinyal İşleme ve İletişim Uygulamaları Kurultayı (SİU)], Izmir, Turkey, 2018. |
|} | |} | ||
Revision as of 12:57, 17 April 2019
Listed below are the papers, first authored by our group members as an indication that the related research is mainly conducted in our group, and the presentations. Research topics are ordered from newest to oldest as well as by considering their importance. Under each topic, papers are ordered from newest to oldest. All materials are subject to copyrights.
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Computing with Nano-Crossbar Arrays
Technology Development
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Comprehensive Performance Optimization
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Fault/Defect/Variation Tolerance
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Logic Synthesis
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National Publications in Turkish
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Reversible Computing
CMOS Fault Tolerance
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Logic Synthesis
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National Publications in Turkish
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Stochastic and Bit Stream Computing
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National Publications in Turkish
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Approximate Computing
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National Publications in Turkish
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Large-Area Electronics
Organic Transistor Modeling
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Reliability of Electronic Products
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National Publications in Turkish
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Analog Circuit Design
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National Publications in Turkish
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Discrete Mathematics
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