EHB 322E: Digital Electronic Circuits

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Contents

Announcements

  • Mar. 18th The first midterm will be held on Thursday Mar. 21st, between 9:30-11:30 in classroom 5302 in EEF.
  • Feb. 1st As a simulation tool, Spice is required for homeworks. Among different Spice-based programs, LTspice is a good and free choice; you can download it by clicking here.

Syllabus

EHB 322E: Digital Electronic Circuits, CRN: 20972, Thursdays 9:30-12:30, Room: 5302 (EEF), Spring 2019.
Instructor

Mustafa Altun

  • Email: altunmus@itu.edu.tr
  • Tel: 02122856635
  • Office hours: 15:00 – 16:30 on Tuesdays in Room:3005, EEF
Teaching Assistant

Sadık İlik

  • Email: iliks@itu.edu.tr
  • Room: 8101 EEF
Grading
  • Quizzes: 10%
    • 2 pop-up quizzes (5% each) - no prior announcement of quiz dates and times
  • Homeworks: 10%
    • 3 homeworks (3.3% each)
  • Midterm Exams: 40%
    • 2 midterms (20% each) during the lecture time that will on 21/3/2019 and 2/5/2019.
  • Final Exam: 40%
Reference Books
  • Rabaey, J. M., Chandrakasan, A. P., & Nikolic, B. (20XX). Digital integrated circuits. Englewood Cliffs: Prentice hall.
  • Uyemura, J. P. (20XX). CMOS logic circuit design. Springer.
  • Kang, S. M., & Leblebici, Y. (20XX). Cmos Digital Integrated Circuits. McGraw-Hill Education.
Policies
  • Homeworks are due at the beginning of class. Late homeworks will be downgraded by 20% for each day passed the due date.
  • Quizzes and exams are in closed-notes and closed-books format.
  • To be eligible of taking the final or the resit exam, your midterm average should be at least 25 (out of 100).

Weekly Course Plan

Date
Topic
Week 1, 7/2/2019 No class
Week 2, 14/2/2019 Introduction
Week 3, 21/2/2019 Switching theory & devices for digital circuits and inverters
Weeks 4, 28/2/2019 NMOS/CMOS inverters & their static and dynamic behaviors
Weeks 5, 7/3/2019 Optimization of multiple-stage inverters and buffers
Week 6, 14/3/2019 Static logic gates and area-delay-power performance analysis
Weeks 7, 21/3/2019 MIDTERM I
Week 8, 28/3/2019 HOLIDAY, no class
Week 9, 4/4/2019 Complex logic gates and their delays
Weeks 10, 11/4/2019 Pass transistor logic with Shannon's expansion and performance analysis
Week 11, 18/4/2019 Dynamic logic gates, synchronization, and performance analysis
Week 12, 25/4/2019 Static and dynamic memory elements: D, SR, and JK flip-flops
Weeks 13, 2/5/2019 MIDTERM II
Weeks 14, 9/5/2019 Synchronization and timing analysis of digital circuits having logic and memory elements
Weeks 15, 16/5/2019 Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories

Course Materials

Homeworks & Solutions Quizzes & Solutions Exams
Homework 1 & Solutions Quiz 1 & Solutions Midterm 1
Homework 2
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